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authorTimothy Pearson <tpearson@raptorengineeringinc.com>2015-08-27 13:18:06 -0500
committerMartin Roth <martinroth@google.com>2015-11-24 19:48:43 +0100
commitc8e10733596882f8751b774fe1ea71d9382ded07 (patch)
treeb2ad9e47f798337d9183903ce43b1a40e842c870 /src/northbridge
parent84216dca3afd084867fd87da5db78d15d37174a1 (diff)
northbridge/amd/amdmct/mct_ddr3: Add DDR3 termination debug output
Change-Id: Iabd2e3e20b0e9719080f6bd7be2032c1749994dc Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com> Reviewed-on: http://review.coreboot.org/12056 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/northbridge')
-rw-r--r--src/northbridge/amd/amdmct/mct_ddr3/mctsdi.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mctsdi.c b/src/northbridge/amd/amdmct/mct_ddr3/mctsdi.c
index c75f2ea698..c1bb89e978 100644
--- a/src/northbridge/amd/amdmct/mct_ddr3/mctsdi.c
+++ b/src/northbridge/amd/amdmct/mct_ddr3/mctsdi.c
@@ -159,6 +159,8 @@ static uint8_t fam15_rttwr(struct DCTStatStruc *pDCTstat, uint8_t dct, uint8_t d
}
}
+ printk(BIOS_INFO, "DIMM %d RttWr: %01x\n", dimm, term);
+
return term;
}
@@ -358,6 +360,7 @@ static uint8_t fam15_rttnom(struct DCTStatStruc *pDCTstat, uint8_t dct, uint8_t
}
}
+ printk(BIOS_INFO, "DIMM %d RttNom: %01x\n", dimm, term);
return term;
}