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authorAngel Pons <th3fanbus@gmail.com>2020-10-29 21:50:14 +0100
committerAngel Pons <th3fanbus@gmail.com>2021-01-05 20:33:24 +0000
commit8eca669fc0727c7559e095f86fbcd6960d6cfccf (patch)
treef74d3af4cc30aabf3031ea56ee48f322d2e331e0 /src/northbridge
parenta553600e187614626f81b72a6e9d9477ae5a5158 (diff)
nb/intel/haswell/memmap.h: Clean up
Drop unused definition and remove outdated comments. Change-Id: I16033b558fe4c01a9394382dc0c9d0bdc66193d9 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46993 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Diffstat (limited to 'src/northbridge')
-rw-r--r--src/northbridge/intel/haswell/memmap.h10
1 files changed, 3 insertions, 7 deletions
diff --git a/src/northbridge/intel/haswell/memmap.h b/src/northbridge/intel/haswell/memmap.h
index ac3b1dbef0..0ff7b52074 100644
--- a/src/northbridge/intel/haswell/memmap.h
+++ b/src/northbridge/intel/haswell/memmap.h
@@ -3,13 +3,9 @@
#ifndef __NORTHBRIDGE_INTEL_HASWELL_MEMMAP_H__
#define __NORTHBRIDGE_INTEL_HASWELL_MEMMAP_H__
-/* Intel Enhanced Debug region */
-#define IED_SIZE CONFIG_IED_REGION_SIZE
-
-/* Northbridge BARs */
-#define DEFAULT_MCHBAR 0xfed10000 /* 16 KB */
-#define DEFAULT_DMIBAR 0xfed18000 /* 4 KB */
-#define DEFAULT_EPBAR 0xfed19000 /* 4 KB */
+#define DEFAULT_MCHBAR 0xfed10000
+#define DEFAULT_DMIBAR 0xfed18000
+#define DEFAULT_EPBAR 0xfed19000
#define GFXVT_BASE_ADDRESS 0xfed90000ULL
#define GFXVT_BASE_SIZE 0x1000