diff options
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2017-03-26 05:07:32 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2017-04-03 06:49:51 +0200 |
| commit | 4d5321c9c465ce40a6a3a2bc1433c4214ce15862 (patch) | |
| tree | e7fecec7af3f7aaf89757845483ce7fa242204f1 /src/northbridge | |
| parent | 4a6e00fd365bee06e2860f813c0fc05c5f4c22b9 (diff) | |
AGESA: Move guard on S3 support functions
Only guard the parts that are problematic for romstage.
Also intention is to move AMD_S3LATE_RESTORE to ramstage in followup
work, it will need OemS3LateRestore.
Change-Id: Ie9c1fb3f3f0ab1951771ed829d4acdd8a59d8fbf
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/19025
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/northbridge')
| -rw-r--r-- | src/northbridge/amd/agesa/oem_s3.c | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/src/northbridge/amd/agesa/oem_s3.c b/src/northbridge/amd/agesa/oem_s3.c index 8ffebc9640..7f51de0831 100644 --- a/src/northbridge/amd/agesa/oem_s3.c +++ b/src/northbridge/amd/agesa/oem_s3.c @@ -58,7 +58,6 @@ static void get_s3nv_data(S3_DATA_TYPE S3DataType, uintptr_t *pos, uintptr_t *le } } -#if defined(__PRE_RAM__) AGESA_STATUS OemInitResume(AMD_RESUME_PARAMS *ResumeParams) { @@ -86,7 +85,7 @@ AGESA_STATUS OemS3LateRestore(AMD_S3LATE_PARAMS *S3LateParams) return AGESA_SUCCESS; } -#else +#if ENV_RAMSTAGE static int spi_SaveS3info(u32 pos, u32 size, u8 *buf, u32 len) { @@ -150,6 +149,8 @@ AGESA_STATUS OemS3Save(AMD_S3SAVE_PARAMS *S3SaveParams) return AGESA_SUCCESS; } +#endif /* ENV_RAMSTAGE */ + const void *OemS3Saved_MTRR_Storage(void) { uintptr_t pos, size; @@ -159,5 +160,3 @@ const void *OemS3Saved_MTRR_Storage(void) return (void*)(pos + sizeof(UINT32)); } - -#endif |