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authorArthur Heymans <arthur@aheymans.xyz>2018-11-29 12:21:12 +0100
committerPatrick Georgi <pgeorgi@google.com>2018-12-03 13:02:49 +0000
commitc679b1f3337b44a36b8b7b5822d91040bbaee249 (patch)
treed6653f9c9571304656fb390ccb812304bd04f3f6 /src/northbridge
parentab72fc24beb3ca95a5d34faa67c33e99873200cf (diff)
nb/intel/gm45: Make fetching the blc_pwm freq its own function
Also check the EDID string using strcmp instead of strncmp. Change-Id: I9ad364f84f3658be98ce7ad3a6f0f0fe3247fc41 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/29924 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/northbridge')
-rw-r--r--src/northbridge/intel/gm45/gma.c61
1 files changed, 36 insertions, 25 deletions
diff --git a/src/northbridge/intel/gm45/gma.c b/src/northbridge/intel/gm45/gma.c
index b86e2b3e7e..64b6a571ba 100644
--- a/src/northbridge/intel/gm45/gma.c
+++ b/src/northbridge/intel/gm45/gma.c
@@ -668,6 +668,39 @@ static u32 freq_to_blc_pwm_ctl(struct device *const dev,
return (blc_mod << 16) | blc_mod;
}
+static u16 get_blc_pwm_freq_value(const char *edid_ascii_string)
+{
+ static u16 blc_pwm_freq;
+ const struct blc_pwm_t *blc_pwm;
+ int i;
+ int blc_array_len;
+
+ if (blc_pwm_freq > 0)
+ return blc_pwm_freq;
+
+ blc_array_len = get_blc_values(&blc_pwm);
+ /* Find EDID string and pwm freq in lookup table */
+ for (i = 0; i < blc_array_len; i++) {
+ if (!strcmp(blc_pwm[i].ascii_string, edid_ascii_string)) {
+ blc_pwm_freq = blc_pwm[i].pwm_freq;
+ printk(BIOS_DEBUG, "Found EDID string: %s in lookup table, pwm: %dHz\n",
+ blc_pwm[i].ascii_string, blc_pwm_freq);
+ break;
+ }
+ }
+
+ if (i == blc_array_len)
+ printk(BIOS_NOTICE, "Your panels EDID `%s` wasn't found in the"
+ "lookup table.\n You may have issues with your panels"
+ "backlight.\n If you want to help improving coreboot"
+ "please report: this EDID string\n and the result"
+ "of `intel_read read BLC_PWM_CTL`"
+ "(from intel-gpu-tools)\n while running vendor BIOS\n",
+ edid_ascii_string);
+
+ return blc_pwm_freq;
+}
+
static void gma_pm_init_post_vbios(struct device *const dev,
const char *edid_ascii_string)
{
@@ -675,9 +708,7 @@ static void gma_pm_init_post_vbios(struct device *const dev,
u32 reg32;
u8 reg8;
- const struct blc_pwm_t *blc_pwm;
- int blc_array_len, i;
- u16 pwm_freq = 0;
+ u16 pwm_freq;
/* Setup Panel Power On Delays */
reg32 = gtt_read(PP_ON_DELAYS);
@@ -708,30 +739,10 @@ static void gma_pm_init_post_vbios(struct device *const dev,
reg8 = 100;
if (conf->duty_cycle != 0)
reg8 = conf->duty_cycle;
- blc_array_len = get_blc_values(&blc_pwm);
- if (conf->default_pwm_freq != 0)
+ pwm_freq = get_blc_pwm_freq_value(edid_ascii_string);
+ if (pwm_freq == 0 && conf->default_pwm_freq != 0)
pwm_freq = conf->default_pwm_freq;
- /* Find EDID string and pwm freq in lookup table */
- for (i = 0; i < blc_array_len; i++) {
- if (!strncmp(blc_pwm[i].ascii_string, edid_ascii_string,
- strlen(blc_pwm[i].ascii_string))) {
- pwm_freq = blc_pwm[i].pwm_freq;
- printk(BIOS_DEBUG, "Found EDID string: %s in lookup table, pwm: %dHz\n",
- blc_pwm[i].ascii_string, pwm_freq);
- break;
- }
- }
-
- if (i == blc_array_len)
- printk(BIOS_NOTICE, "Your panels EDID `%s` wasn't found in the"
- "lookup table.\n You may have issues with your panels"
- "backlight.\n If you want to help improving coreboot"
- "please report: this EDID string\n and the result"
- "of `intel_read read BLC_PWM_CTL`"
- "(from intel-gpu-tools)\n while running vendor BIOS\n",
- edid_ascii_string);
-
if (pwm_freq == 0)
gtt_write(BLC_PWM_CTL, 0x06100610);
else