diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2014-11-27 13:23:32 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2014-12-02 13:58:08 +0100 |
| commit | a3ea1e45902b64b45e141ebae2f59b94e745d187 (patch) | |
| tree | 32424dee206ab3261120d920e32b3769daa8a783 /src/northbridge | |
| parent | 59ab4e99ee9553cc472970656ee85dc255f502b7 (diff) | |
i945: Bit 49 of CAPID0 trivial fix
Change-Id: Ifeb277c375a0685b76fa01174a990a4cd05023bc
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: http://review.coreboot.org/7587
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/northbridge')
| -rw-r--r-- | src/northbridge/intel/i945/early_init.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/northbridge/intel/i945/early_init.c b/src/northbridge/intel/i945/early_init.c index aaa17e503b..08ffdf6a38 100644 --- a/src/northbridge/intel/i945/early_init.c +++ b/src/northbridge/intel/i945/early_init.c @@ -197,7 +197,7 @@ static void i945_setup_bars(void) /* Wait for MCH BAR to come up */ printk(BIOS_DEBUG, "Waiting for MCHBAR to come up..."); - if ((pci_read_config8(PCI_DEV(0, 0x0f, 0), 0xe6) & 0x2) == 0x00) { /* Bit 49 of CAPID0 */ + if ((pci_read_config32(PCI_DEV(0, 0x00, 0), 0xe4) & 0x20000) == 0x00) { /* Bit 49 of CAPID0 */ do { reg8 = *(volatile u8 *)0xfed40000; } while (!(reg8 & 0x80)); |