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authorPeter Stuge <peter@stuge.se>2010-10-01 10:02:33 +0000
committerPatrick Georgi <patrick.georgi@coresystems.de>2010-10-01 10:02:33 +0000
commit76d914391cb0a25af0962d0a5e615d551e44a777 (patch)
tree67a1757692657896922530a25998eb5f3cb410a6 /src/northbridge
parent6f56ad2d2ef6fbf9564123c5a9b64f05d006b2d7 (diff)
Make i945/raminit.c:fsbclk() return u16 rather than int
This is needed for Gentoo gcc-4.1.2 to build the i945 code. A warning is thrown because the comparison in the last hunk is between u16 and -1 and can never be true. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5895 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge')
-rw-r--r--src/northbridge/intel/i945/raminit.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/src/northbridge/intel/i945/raminit.c b/src/northbridge/intel/i945/raminit.c
index 62cd193d04..1595b8b3bc 100644
--- a/src/northbridge/intel/i945/raminit.c
+++ b/src/northbridge/intel/i945/raminit.c
@@ -103,7 +103,7 @@ static int memclk(void)
}
#if defined(CONFIG_NORTHBRIDGE_INTEL_I945GM)
-static int fsbclk(void)
+static u16 fsbclk(void)
{
switch (MCHBAR32(CLKCFG) & 7) {
case 0: return 400;
@@ -111,10 +111,10 @@ static int fsbclk(void)
case 3: return 667;
default: printk(BIOS_DEBUG, "fsbclk: unknown register value %x\n", MCHBAR32(CLKCFG) & 7);
}
- return -1;
+ return 0xffff;
}
#elif defined(CONFIG_NORTHBRIDGE_INTEL_I945GC)
-static int fsbclk(void)
+static u16 fsbclk(void)
{
switch (MCHBAR32(CLKCFG) & 7) {
case 0: return 1066;
@@ -122,7 +122,7 @@ static int fsbclk(void)
case 2: return 800;
default: printk(BIOS_DEBUG, "fsbclk: unknown register value %x\n", MCHBAR32(CLKCFG) & 7);
}
- return -1;
+ return 0xffff;
}
#endif
@@ -1929,7 +1929,7 @@ static void sdram_program_pll_settings(struct sys_info *sysinfo)
MCHBAR32(PLLMON) = 0x80800000;
sysinfo->fsb_frequency = fsbclk();
- if (sysinfo->fsb_frequency == -1)
+ if (sysinfo->fsb_frequency == 0xffff)
die("Unsupported FSB speed");
/* Program CPCTL according to FSB speed */