- Update abuild.sh so it will rebuild successfull builds

- Move pci_set_method out of hardwaremain.c
- Re-add debugging name field but only include the CONFIG_CHIP_NAME is
  enabled.  All instances are now wrapped in CHIP_NAME
- Many minor cleanups so most ports build.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1737 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

9 files changed, 218 insertions, 207 deletions

diff --git a/src/northbridge/amd/amdk8/northbridge.c b/src/northbridge/amd/amdk8/northbridge.c
index 168661959c..8954bfefaa 100644
--- a/src/northbridge/amd/amdk8/northbridge.c
+++ b/src/northbridge/amd/amdk8/northbridge.c
@@ -717,6 +717,7 @@ static void enable_dev(struct device *dev)
 	/* Set the operations if it is a special bus type */
 	if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) {
 		dev->ops = &pci_domain_ops;
+		pci_set_method_conf1();
 	}
 	else if (dev->path.type == DEVICE_PATH_APIC_CLUSTER) {
 		dev->ops = &cpu_bus_ops;
@@ -724,5 +725,6 @@ static void enable_dev(struct device *dev)
 }
 
 struct chip_operations northbridge_amd_amdk8_ops = {
+	CHIP_NAME("AMD K8 Northbridge")
 	.enable_dev = enable_dev,
 };
diff --git a/src/northbridge/emulation/qemu-i386/northbridge.c b/src/northbridge/emulation/qemu-i386/northbridge.c
index 09fa573090..0a8ed5c1d8 100644
--- a/src/northbridge/emulation/qemu-i386/northbridge.c
+++ b/src/northbridge/emulation/qemu-i386/northbridge.c
@@ -3,82 +3,75 @@
 #include <stdint.h>
 #include <device/device.h>
 #include <device/pci.h>
-#include <device/hypertransport.h>
 #include <stdlib.h>
 #include <string.h>
 #include <bitops.h>
 #include "chip.h"
 #include "northbridge.h"
 
-void hard_reset(void)
-{
-	printk_err("Hard_RESET!!!\n");
-}
-
 #define BRIDGE_IO_MASK (IORESOURCE_IO | IORESOURCE_MEM)
 
 static void pci_domain_read_resources(device_t dev)
 {
-        struct resource *resource;
-        unsigned reg;
+	struct resource *resource;
 
-        /* Initialize the system wide io space constraints */
-        resource = new_resource(dev, 0);
-        resource->base  = 0x400;
-        resource->limit = 0xffffUL;
-        resource->flags = IORESOURCE_IO;
-        compute_allocate_resource(&dev->link[0], resource,
-                IORESOURCE_IO, IORESOURCE_IO);
+	/* Initialize the system wide io space constraints */
+	resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0,0));
+	resource->limit = 0xffffUL;
+	resource->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
 
-        /* Initialize the system wide memory resources constraints */
-        resource = new_resource(dev, 1);
-        resource->limit = 0xffffffffULL;
-        resource->flags = IORESOURCE_MEM;
-        compute_allocate_resource(&dev->link[0], resource,
-                IORESOURCE_MEM, IORESOURCE_MEM);
+	/* Initialize the system wide memory resources constraints */
+	resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1,0));
+	resource->limit = 0xffffffffULL;
+	resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
 }
 
 static void ram_resource(device_t dev, unsigned long index,
-        unsigned long basek, unsigned long sizek)
+	unsigned long basek, unsigned long sizek)
 {
-        struct resource *resource;
+	struct resource *resource;
+
+	if (!sizek) {
+		return;
+	}
+	resource = new_resource(dev, index);
+	resource->base	= ((resource_t)basek) << 10;
+	resource->size	= ((resource_t)sizek) << 10;
+	resource->flags =  IORESOURCE_MEM | IORESOURCE_CACHEABLE | \
+		IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED;
+}
 
-        if (!sizek) {
-                return;
-        }
-        resource = new_resource(dev, index);
-        resource->base  = ((resource_t)basek) << 10;
-        resource->size  = ((resource_t)sizek) << 10;
-        resource->flags =  IORESOURCE_MEM | IORESOURCE_CACHEABLE | \
-                IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED;
+static void tolm_test(void *gp, struct device *dev, struct resource *new)
+{
+	struct resource **best_p = gp;
+	struct resource *best;
+	best = *best_p;
+	if (!best || (best->base > new->base)) {
+		best = new;
+	}
+	*best_p = best;
 }
 
+static uint32_t find_pci_tolm(struct bus *bus)
+{
+	struct resource *min;
+	uint32_t tolm;
+	min = 0;
+	search_bus_resources(bus, IORESOURCE_MEM, IORESOURCE_MEM, tolm_test, &min);
+	tolm = 0xffffffffUL;
+	if (min && tolm > min->base) {
+		tolm = min->base;
+	}
+	return tolm;
+}
 
 static void pci_domain_set_resources(device_t dev)
 {
-        struct resource *resource, *last;
 	device_t mc_dev;
-        uint32_t pci_tolm;
+	uint32_t pci_tolm;
 	uint32_t idx;
 
-        pci_tolm = 0xffffffffUL;
-        last = &dev->resource[dev->resources];
-        for(resource = &dev->resource[0]; resource < last; resource++)
-        {
-                compute_allocate_resource(&dev->link[0], resource,
-                        BRIDGE_IO_MASK, resource->flags & BRIDGE_IO_MASK);
-
-                resource->flags |= IORESOURCE_STORED;
-                report_resource_stored(dev, resource, "");
-
-                if ((resource->flags & IORESOURCE_MEM) &&
-                        (pci_tolm > resource->base))
-                {
-                        pci_tolm = resource->base;
-                }
-        }
-
-	
+	pci_tolm = find_pci_tolm(&dev->link[0]);
 	mc_dev = dev->link[0].children;
 	if (mc_dev) {
 		unsigned long tomk, tolmk;
@@ -105,29 +98,28 @@ static void pci_domain_set_resources(device_t dev)
 
 static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max)
 {
-        max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max);
-        return max;
+	max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max);
+	return max;
 }
 
 static struct device_operations pci_domain_ops = {
-        .read_resources   = pci_domain_read_resources,
-        .set_resources    = pci_domain_set_resources,
-        .enable_resources = enable_childrens_resources,
-        .init             = 0,
-        .scan_bus         = pci_domain_scan_bus,
+	.read_resources	  = pci_domain_read_resources,
+	.set_resources	  = pci_domain_set_resources,
+	.enable_resources = enable_childrens_resources,
+	.init		  = 0,
+	.scan_bus	  = pci_domain_scan_bus,
 };  
 
 static void enable_dev(struct device *dev)
 {
-        struct device_path path;
-
-        /* Set the operations if it is a special bus type */
-        if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) {
-                dev->ops = &pci_domain_ops;
-        }
+	/* Set the operations if it is a special bus type */
+	if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) {
+		dev->ops = &pci_domain_ops;
+		pci_set_method();
+	}
 }
 
 struct chip_operations northbridge_emulation_qemu_i386_ops = {
-	// .name      = "QEMU Northbridge",
+	CHIP_NAME("QEMU Northbridge")
 	.enable_dev = enable_dev,
 };
diff --git a/src/northbridge/intel/e7501/northbridge.c b/src/northbridge/intel/e7501/northbridge.c
index 43c354cfc1..ff65e29785 100644
--- a/src/northbridge/intel/e7501/northbridge.c
+++ b/src/northbridge/intel/e7501/northbridge.c
@@ -16,19 +16,14 @@ static void pci_domain_read_resources(device_t dev)
         unsigned reg;
 
         /* Initialize the system wide io space constraints */
-        resource = new_resource(dev, 0);
-        resource->base  = 0x400;
+        resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
         resource->limit = 0xffffUL;
-        resource->flags = IORESOURCE_IO;
-        compute_allocate_resource(&dev->link[0], resource,
-                IORESOURCE_IO, IORESOURCE_IO);
+        resource->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
 
         /* Initialize the system wide memory resources constraints */
-        resource = new_resource(dev, 1);
+        resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0));
         resource->limit = 0xffffffffULL;
-        resource->flags = IORESOURCE_MEM;
-        compute_allocate_resource(&dev->link[0], resource,
-                IORESOURCE_MEM, IORESOURCE_MEM);
+        resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
 }
 
 static void ram_resource(device_t dev, unsigned long index,
@@ -46,29 +41,37 @@ static void ram_resource(device_t dev, unsigned long index,
                 IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED;
 }
 
+static void tolm_test(void *gp, struct device *dev, struct resource *new)
+{
+	struct resource **best_p = gp;
+	struct resource *best;
+	best = *best_p;
+	if (!best || (best->base > new->base)) {
+		best = new;
+	}
+	*best_p = best;
+}
+
+static uint32_t find_pci_tolm(struct bus *bus)
+{
+	struct resource *min;
+	uint32_t tolm;
+	min = 0;
+	search_bus_resources(bus, IORESOURCE_MEM, IORESOURCE_MEM, tolm_test, &min);
+	tolm = 0xffffffffUL;
+	if (min && tolm > min->base) {
+		tolm = min->base;
+	}
+	return tolm;
+}
+
 static void pci_domain_set_resources(device_t dev)
 {
         struct resource *resource, *last;
 	device_t mc_dev;
         uint32_t pci_tolm;
 
-        pci_tolm = 0xffffffffUL;
-        last = &dev->resource[dev->resources];
-        for(resource = &dev->resource[0]; resource < last; resource++)
-        {
-                compute_allocate_resource(&dev->link[0], resource,
-                        BRIDGE_IO_MASK, resource->flags & BRIDGE_IO_MASK);
-
-                resource->flags |= IORESOURCE_STORED;
-                report_resource_stored(dev, resource, "");
-
-                if ((resource->flags & IORESOURCE_MEM) &&
-                        (pci_tolm > resource->base))
-                {
-                        pci_tolm = resource->base;
-                }
-        }
-
+        pci_tolm = find_pci_tolm(&dev->link[0]);
 	mc_dev = dev->link[0].children;
 	if (mc_dev) {
 		/* Figure out which areas are/should be occupied by RAM.
@@ -175,16 +178,16 @@ static struct device_operations cpu_bus_ops = {
 
 static void enable_dev(struct device *dev)
 {
-        struct device_path path;
-
         /* Set the operations if it is a special bus type */
         if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) {
                 dev->ops = &pci_domain_ops;
+		pci_set_method_conf1();
         }
         else if (dev->path.type == DEVICE_PATH_APIC_CLUSTER) {
                 dev->ops = &cpu_bus_ops;
         }
 }
 struct chip_operations northbridge_intel_e7501_ops = {
+	CHIP_NAME("Intel E7501 northbridge")
 	.enable_dev = enable_dev,
 };
diff --git a/src/northbridge/intel/i855pm/northbridge.c b/src/northbridge/intel/i855pm/northbridge.c
index 38a0a4a196..3021397085 100644
--- a/src/northbridge/intel/i855pm/northbridge.c
+++ b/src/northbridge/intel/i855pm/northbridge.c
@@ -16,19 +16,14 @@ static void pci_domain_read_resources(device_t dev)
         unsigned reg;
 
         /* Initialize the system wide io space constraints */
-        resource = new_resource(dev, 0);
-        resource->base  = 0x400;
+        resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
         resource->limit = 0xffffUL;
-        resource->flags = IORESOURCE_IO;
-        compute_allocate_resource(&dev->link[0], resource,
-                IORESOURCE_IO, IORESOURCE_IO);
+        resource->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
 
         /* Initialize the system wide memory resources constraints */
-        resource = new_resource(dev, 1);
+        resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0));
         resource->limit = 0xffffffffULL;
-        resource->flags = IORESOURCE_MEM;
-        compute_allocate_resource(&dev->link[0], resource,
-                IORESOURCE_MEM, IORESOURCE_MEM);
+        resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
 }
 
 static void ram_resource(device_t dev, unsigned long index,
@@ -46,29 +41,36 @@ static void ram_resource(device_t dev, unsigned long index,
                 IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED;
 }
 
+static void tolm_test(void *gp, struct device *dev, struct resource *new)
+{
+	struct resource **best_p = gp;
+	struct resource *best;
+	best = *best_p;
+	if (!best || (best->base > new->base)) {
+		best = new;
+	}
+	*best_p = best;
+}
+
+static uint32_t find_pci_tolm(struct bus *bus)
+{
+	struct resource *min;
+	uint32_t tolm;
+	min = 0;
+	search_bus_resources(bus, IORESOURCE_MEM, IORESOURCE_MEM, tolm_test, &min);
+	tolm = 0xffffffffUL;
+	if (min && tolm > min->base) {
+		tolm = min->base;
+	}
+	return tolm;
+}
+
 static void pci_domain_set_resources(device_t dev)
 {
-        struct resource *resource, *last;
 	device_t mc_dev;
         uint32_t pci_tolm;
 
-        pci_tolm = 0xffffffffUL;
-        last = &dev->resource[dev->resources];
-        for(resource = &dev->resource[0]; resource < last; resource++)
-        {
-                compute_allocate_resource(&dev->link[0], resource,
-                        BRIDGE_IO_MASK, resource->flags & BRIDGE_IO_MASK);
-
-                resource->flags |= IORESOURCE_STORED;
-                report_resource_stored(dev, resource, "");
-
-                if ((resource->flags & IORESOURCE_MEM) &&
-                        (pci_tolm > resource->base))
-                {
-                        pci_tolm = resource->base;
-                }
-        }
-
+        pci_tolm = find_pci_tolm(&dev->link[0]);
 	mc_dev = dev->link[0].children;
 	if (mc_dev) {
 		/* Figure out which areas are/should be occupied by RAM.
@@ -147,6 +149,7 @@ static void enable_dev(struct device *dev)
         /* Set the operations if it is a special bus type */
         if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) {
                 dev->ops = &pci_domain_ops;
+		pci_set_method();
         }
         else if (dev->path.type == DEVICE_PATH_APIC_CLUSTER) {
                 dev->ops = &cpu_bus_ops;
@@ -154,6 +157,6 @@ static void enable_dev(struct device *dev)
 }
 
 struct chip_operations northbridge_intel_i855pm_control = {
-        .name       = "intel i855pm Northbridge",
+        CHIP_NAME("intel i855pm Northbridge")
 	.enable_dev = enable_dev,
 };
diff --git a/src/northbridge/intel/i855pm/raminit.c b/src/northbridge/intel/i855pm/raminit.c
index 5a5992268d..136e3cb51a 100644
--- a/src/northbridge/intel/i855pm/raminit.c
+++ b/src/northbridge/intel/i855pm/raminit.c
@@ -19,6 +19,7 @@
 /* converted to C 6/2004 yhlu */
 
 #define DEBUG_RAM_CONFIG 1
+#undef ASM_CONSOLE_LOGLEVEL
 #define ASM_CONSOLE_LOGLEVEL 9
 #define dumpnorth() dump_pci_device(PCI_DEV(0, 0, 1)) 
 
diff --git a/src/northbridge/transmeta/tm5800/northbridge.c b/src/northbridge/transmeta/tm5800/northbridge.c
index 107ebe2aed..8a85a9e704 100644
--- a/src/northbridge/transmeta/tm5800/northbridge.c
+++ b/src/northbridge/transmeta/tm5800/northbridge.c
@@ -19,19 +19,14 @@ static void pci_domain_read_resources(device_t dev)
         unsigned reg;
 
         /* Initialize the system wide io space constraints */
-        resource = new_resource(dev, 0);
-        resource->base  = 0x400;
+        resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0,0));
         resource->limit = 0xffffUL;
-        resource->flags = IORESOURCE_IO;
-        compute_allocate_resource(&dev->link[0], resource,
-                IORESOURCE_IO, IORESOURCE_IO);
+        resource->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
 
         /* Initialize the system wide memory resources constraints */
-        resource = new_resource(dev, 1);
+        resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1,0));
         resource->limit = 0xffffffffULL;
-        resource->flags = IORESOURCE_MEM;
-        compute_allocate_resource(&dev->link[0], resource,
-                IORESOURCE_MEM, IORESOURCE_MEM);
+        resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
 }
 
 static void ram_resource(device_t dev, unsigned long index,
@@ -49,29 +44,37 @@ static void ram_resource(device_t dev, unsigned long index,
                 IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED;
 }
 
+static void tolm_test(void *gp, struct device *dev, struct resource *new)
+{
+	struct resource **best_p = gp;
+	struct resource *best;
+	best = *best_p;
+	if (!best || (best->base > new->base)) {
+		best = new;
+	}
+	*best_p = best;
+}
+
+static uint32_t find_pci_tolm(struct bus *bus)
+{
+	struct resource *min;
+	uint32_t tolm;
+	min = 0;
+	search_bus_resources(bus, IORESOURCE_MEM, IORESOURCE_MEM, tolm_test, &min);
+	tolm = 0xffffffffUL;
+	if (min && tolm > min->base) {
+		tolm = min->base;
+	}
+	return tolm;
+}
+
 static void pci_domain_set_resources(device_t dev)
 {
         struct resource *resource, *last;
 	device_t mc_dev;
         uint32_t pci_tolm;
 
-        pci_tolm = 0xffffffffUL;
-        last = &dev->resource[dev->resources];
-        for(resource = &dev->resource[0]; resource < last; resource++)
-        {
-                compute_allocate_resource(&dev->link[0], resource,
-                        BRIDGE_IO_MASK, resource->flags & BRIDGE_IO_MASK);
-
-                resource->flags |= IORESOURCE_STORED;
-                report_resource_stored(dev, resource, "");
-
-                if ((resource->flags & IORESOURCE_MEM) &&
-                        (pci_tolm > resource->base))
-                {
-                        pci_tolm = resource->base;
-                }
-        }
-
+        pci_tolm = find_pci_tolm(&dev->link[0]);
 	mc_dev = dev->link[0].children;
 	if (mc_dev) {
 		/* Figure out which areas are/should be occupied by RAM.
@@ -139,6 +142,7 @@ static void enable_dev(struct device *dev)
         /* Set the operations if it is a special bus type */
         if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) {
                 dev->ops = &pci_domain_ops;
+		pci_set_method();
         }
         else if (dev->path.type == DEVICE_PATH_APIC_CLUSTER) {
                 dev->ops = &cpu_bus_ops;
@@ -146,6 +150,6 @@ static void enable_dev(struct device *dev)
 }
 
 struct chip_operations northbridge_transmeta_tm5800_control = {
-	.name       = "Transmeta tm5800 Northbridge",
+	CHIP_NAME("Transmeta tm5800 Northbridge")
 	.enable_dev = enable_dev, 
 };
diff --git a/src/northbridge/via/vt8601/northbridge.c b/src/northbridge/via/vt8601/northbridge.c
index 956a485cf4..4daedc5f3e 100644
--- a/src/northbridge/via/vt8601/northbridge.c
+++ b/src/northbridge/via/vt8601/northbridge.c
@@ -55,19 +55,14 @@ static void pci_domain_read_resources(device_t dev)
         struct resource *resource;
 
         /* Initialize the system wide io space constraints */
-        resource = new_resource(dev, 0);
-        resource->base  = 0x400;
+        resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0,0));
         resource->limit = 0xffffUL;
-        resource->flags = IORESOURCE_IO;
-        compute_allocate_resource(&dev->link[0], resource,
-                IORESOURCE_IO, IORESOURCE_IO);
+        resource->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
 
         /* Initialize the system wide memory resources constraints */
-        resource = new_resource(dev, 1);
+        resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1,0));
         resource->limit = 0xffffffffULL;
-        resource->flags = IORESOURCE_MEM;
-        compute_allocate_resource(&dev->link[0], resource,
-                IORESOURCE_MEM, IORESOURCE_MEM);
+        resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
 }
 
 static void ram_resource(device_t dev, unsigned long index,
@@ -85,32 +80,39 @@ static void ram_resource(device_t dev, unsigned long index,
                 IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED;
 }
 
-static const uint8_t ramregs[] = {0x5a, 0x5b, 0x5c, 0x5d, 0x5e, 0x5f, 
-	  				0x56, 0x57};
+static void tolm_test(void *gp, struct device *dev, struct resource *new)
+{
+	struct resource **best_p = gp;
+	struct resource *best;
+	best = *best_p;
+	if (!best || (best->base > new->base)) {
+		best = new;
+	}
+	*best_p = best;
+}
+
+static uint32_t find_pci_tolm(struct bus *bus)
+{
+	struct resource *min;
+	uint32_t tolm;
+	min = 0;
+	search_bus_resources(bus, IORESOURCE_MEM, IORESOURCE_MEM, tolm_test, &min);
+	tolm = 0xffffffffUL;
+	if (min && tolm > min->base) {
+		tolm = min->base;
+	}
+	return tolm;
+}
 
 static void pci_domain_set_resources(device_t dev)
 {
-        struct resource *resource, *last;
+	static const uint8_t ramregs[] = {
+		0x5a, 0x5b, 0x5c, 0x5d, 0x5e, 0x5f, 0x56, 0x57
+	};
 	device_t mc_dev;
         uint32_t pci_tolm;
 
-        pci_tolm = 0xffffffffUL;
-        last = &dev->resource[dev->resources];
-        for(resource = &dev->resource[0]; resource < last; resource++)
-        {
-                compute_allocate_resource(&dev->link[0], resource,
-                        BRIDGE_IO_MASK, resource->flags & BRIDGE_IO_MASK);
-
-                resource->flags |= IORESOURCE_STORED;
-                report_resource_stored(dev, resource, "");
-
-                if ((resource->flags & IORESOURCE_MEM) &&
-                        (pci_tolm > resource->base))
-                {
-                        pci_tolm = resource->base;
-                }
-        }
-
+        pci_tolm = find_pci_tolm(&dev->link[0]);
 	mc_dev = dev->link[0].children;
 	if (mc_dev) {
 		unsigned long tomk, tolmk;
@@ -184,6 +186,7 @@ static void enable_dev(struct device *dev)
         /* Set the operations if it is a special bus type */
         if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) {
                 dev->ops = &pci_domain_ops;
+		pci_set_method();
         }
         else if (dev->path.type == DEVICE_PATH_APIC_CLUSTER) {
                 dev->ops = &cpu_bus_ops;
@@ -191,6 +194,6 @@ static void enable_dev(struct device *dev)
 }
 
 struct chip_operations northbridge_via_vt8601_ops = {
+	CHIP_NAME("VIA vt8601 Northbridge")
 	.enable_dev = enable_dev, 
-	.name      = "VIA vt8601 Northbridge",
 };
diff --git a/src/northbridge/via/vt8623/northbridge.c b/src/northbridge/via/vt8623/northbridge.c
index 6597da2729..94880b9102 100644
--- a/src/northbridge/via/vt8623/northbridge.c
+++ b/src/northbridge/via/vt8623/northbridge.c
@@ -135,19 +135,14 @@ static void pci_domain_read_resources(device_t dev)
         unsigned reg;
 
         /* Initialize the system wide io space constraints */
-        resource = new_resource(dev, 0);
-        resource->base  = 0x400;
+        resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0,0));
         resource->limit = 0xffffUL;
-        resource->flags = IORESOURCE_IO;
-        compute_allocate_resource(&dev->link[0], resource,
-                IORESOURCE_IO, IORESOURCE_IO);
+        resource->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
 
         /* Initialize the system wide memory resources constraints */
-        resource = new_resource(dev, 1);
+        resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1,0));
         resource->limit = 0xffffffffULL;
-        resource->flags = IORESOURCE_MEM;
-        compute_allocate_resource(&dev->link[0], resource,
-                IORESOURCE_MEM, IORESOURCE_MEM);
+        resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
 }
 
 static void ram_resource(device_t dev, unsigned long index,
@@ -165,31 +160,38 @@ static void ram_resource(device_t dev, unsigned long index,
                 IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED;
 }
 
-static const uint8_t ramregs[] = {0x5a, 0x5b, 0x5c, 0x5d };
+static void tolm_test(void *gp, struct device *dev, struct resource *new)
+{
+	struct resource **best_p = gp;
+	struct resource *best;
+	best = *best_p;
+	if (!best || (best->base > new->base)) {
+		best = new;
+	}
+	*best_p = best;
+}
+
+static uint32_t find_pci_tolm(struct bus *bus)
+{
+	struct resource *min;
+	uint32_t tolm;
+	min = 0;
+	search_bus_resources(bus, IORESOURCE_MEM, IORESOURCE_MEM, tolm_test, &min);
+	tolm = 0xffffffffUL;
+	if (min && tolm > min->base) {
+		tolm = min->base;
+	}
+	return tolm;
+}
 
 static void pci_domain_set_resources(device_t dev)
 {
+	static const uint8_t ramregs[] = {0x5a, 0x5b, 0x5c, 0x5d };
         struct resource *resource, *last;
 	device_t mc_dev;
         uint32_t pci_tolm;
 
-        pci_tolm = 0xffffffffUL;
-        last = &dev->resource[dev->resources];
-        for(resource = &dev->resource[0]; resource < last; resource++)
-        {
-                compute_allocate_resource(&dev->link[0], resource,
-                        BRIDGE_IO_MASK, resource->flags & BRIDGE_IO_MASK);
-
-                resource->flags |= IORESOURCE_STORED;
-                report_resource_stored(dev, resource, "");
-
-                if ((resource->flags & IORESOURCE_MEM) &&
-                        (pci_tolm > resource->base))
-                {
-                        pci_tolm = resource->base;
-                }
-        }
-
+        pci_tolm = find_pci_tolm(&dev->link[0]);
 	mc_dev = dev->link[0].children;
 	if (mc_dev) {
 		unsigned long tomk, tolmk;
@@ -266,6 +268,7 @@ static void enable_dev(struct device *dev)
         /* Set the operations if it is a special bus type */
         if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) {
                 dev->ops = &pci_domain_ops;
+		pci_set_method();
         }
         else if (dev->path.type == DEVICE_PATH_APIC_CLUSTER) {
                 dev->ops = &cpu_bus_ops;
@@ -273,6 +276,6 @@ static void enable_dev(struct device *dev)
 }
 
 struct chip_operations northbridge_via_vt8623_control = {
+	CHIP_NAME("VIA vt8623 Northbridge")
 	.enable_dev = enable_dev,
-	.name       = "VIA vt8623 Northbridge",
 };
diff --git a/src/northbridge/via/vt8623/raminit.c b/src/northbridge/via/vt8623/raminit.c
index 10086a02fd..03765489db 100644
--- a/src/northbridge/via/vt8623/raminit.c
+++ b/src/northbridge/via/vt8623/raminit.c
@@ -1,4 +1,4 @@
-#include <cpu/p6/mtrr.h>
+#include <cpu/x86/mtrr.h>
 #include "raminit.h"
 
 /*