diff options
| author | Angel Pons <th3fanbus@gmail.com> | 2020-05-02 23:14:27 +0200 |
|---|---|---|
| committer | Angel Pons <th3fanbus@gmail.com> | 2020-05-21 18:27:48 +0000 |
| commit | e7afcd5391ac6cde9f2e8790be7418893228e5a3 (patch) | |
| tree | 70a1f2bd0fbbe0af67bd3684477c5e30f9d4d63e /src/northbridge | |
| parent | ad7040051982c986b8559e9cc107a96a017ac82b (diff) | |
nb/intel/sandybridge: Replace macros with functions
Turn `iosav_run_queue` and `iosav_run_once` into functions. Inlining
them does not have any effect, as the resulting binary is identical.
Tested on Asus P8Z77-V LX2, still boots.
Change-Id: I7844814eeedad9b1d24f833a77c90902fa926bfe
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40983
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Diffstat (limited to 'src/northbridge')
| -rw-r--r-- | src/northbridge/intel/sandybridge/raminit_common.c | 12 |
1 files changed, 8 insertions, 4 deletions
diff --git a/src/northbridge/intel/sandybridge/raminit_common.c b/src/northbridge/intel/sandybridge/raminit_common.c index 96a6189118..0f42b6f461 100644 --- a/src/northbridge/intel/sandybridge/raminit_common.c +++ b/src/northbridge/intel/sandybridge/raminit_common.c @@ -18,11 +18,15 @@ /* FIXME: no support for 3-channel chipsets */ /* length: [1..4] */ -/* FIXME: replace with proper functions later */ -#define iosav_run_queue(ch, loops, length, as_timer) \ - MCHBAR32(IOSAV_SEQ_CTL_ch(ch)) = ((loops) | (((length) - 1) << 18) | ((as_timer) << 22)) +static void iosav_run_queue(const int ch, const u8 loops, const u8 length, const u8 as_timer) +{ + MCHBAR32(IOSAV_SEQ_CTL_ch(ch)) = loops | ((length - 1) << 18) | (as_timer << 22); +} -#define iosav_run_once(ch, length) iosav_run_queue(ch, 1, length, 0) +static void iosav_run_once(const int ch, const u8 length) +{ + iosav_run_queue(ch, 1, length, 0); +} static void sfence(void) { |