diff options
author | Stefan Reinauer <reinauer@chromium.org> | 2012-04-30 14:57:51 -0700 |
---|---|---|
committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2012-05-01 19:27:34 +0200 |
commit | e6063fee5c954d5acd80fd51e11aeac31e83d13d (patch) | |
tree | 331b26df9de6e8b4e08473432de1d293602487df /src/northbridge | |
parent | a1155b47ca42ad1813c36e1d6de6e8116ae13845 (diff) |
Fix Sandybridge/Ivybridge mainboards according to code review
This fixes a few cosmetics with the following three boards:
- Intel Emerald Lake 2
- Samsung ChromeBook
- Samsung ChromeBox
The following issues were fixed:
- rely on include path in ASL code instead of specifying relative
paths
- use updated ALIGN_CURRENT in acpi_tables.c
- use preprocessor defines instead of hard coded values where possible
Change-Id: Ia5941be3873aa84c30c13ff2f0428d1c52daa563
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/963
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/northbridge')
-rw-r--r-- | src/northbridge/intel/sandybridge/sandybridge.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/northbridge/intel/sandybridge/sandybridge.h b/src/northbridge/intel/sandybridge/sandybridge.h index 9ff6555fb5..c7bea987b9 100644 --- a/src/northbridge/intel/sandybridge/sandybridge.h +++ b/src/northbridge/intel/sandybridge/sandybridge.h @@ -51,6 +51,7 @@ #define DEFAULT_MCHBAR 0xfed10000 /* 16 KB */ #define DEFAULT_DMIBAR 0xfed18000 /* 4 KB */ #define DEFAULT_EPBAR 0xfed19000 /* 4 KB */ +#define DEFAULT_RCBABASE 0xfed1c000 #include "../../../southbridge/intel/bd82x6x/pch.h" |