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authorNico Huber <nico.h@gmx.de>2023-05-18 13:53:35 +0200
committerFelix Singer <service+coreboot-gerrit@felixsinger.de>2023-05-21 19:50:35 +0000
commite55825f3c6686faba7af0538b3967a95ba26e10c (patch)
tree65441f60cf013d72f5889e6f0bb8eb8c2e1d1e32 /src/northbridge
parente5888da8de5b098271e95953846b313f25a42d63 (diff)
nb/intel/gm45/gma: Use res2mmio() directly for GTT access
This is how res2mmio() is supposed to be used and there was no other use of the `mmio` variable left anyway. Change-Id: Ifa4645bcc9ae971966587d9b67662b9dc8bae3d0 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/75377 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Diffstat (limited to 'src/northbridge')
-rw-r--r--src/northbridge/intel/gm45/gma.c5
1 files changed, 1 insertions, 4 deletions
diff --git a/src/northbridge/intel/gm45/gma.c b/src/northbridge/intel/gm45/gma.c
index ef7b872b58..6034ae301e 100644
--- a/src/northbridge/intel/gm45/gma.c
+++ b/src/northbridge/intel/gm45/gma.c
@@ -172,7 +172,6 @@ const char *gm45_get_lvds_edid_str(void)
static void gma_func0_init(struct device *dev)
{
- u8 *mmio;
const struct northbridge_intel_gm45_config *const conf = dev->chip_info;
const char *edid_str;
@@ -188,14 +187,12 @@ static void gma_func0_init(struct device *dev)
if (!edid_str)
printk(BIOS_ERR, "Failed to obtain LVDS EDID string!\n");
- mmio = res2mmio(gtt_res, 0, 0);
-
/*
* GTT base is at a 2M offset and is 2M big. If GTT is smaller than 2M
* cycles are simply not decoded which is fine.
*/
pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER);
- memset(mmio + 2 * MiB, 0, 2 * MiB);
+ memset(res2mmio(gtt_res, 2*MiB, 0), 0, 2*MiB);
if (CONFIG(NO_GFX_INIT))
pci_and_config16(dev, PCI_COMMAND, ~PCI_COMMAND_MASTER);