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authorAngel Pons <th3fanbus@gmail.com>2021-01-29 18:07:01 +0100
committerPaul Fagerburg <pfagerburg@chromium.org>2021-08-02 14:58:56 +0000
commitbc04997f75dfed7d58212565a45f8f51d7473e70 (patch)
treed466ee98e93d4d79d81958a4a422226c27a8efa7 /src/northbridge
parentfbc46a3bfb507beb872aafc76dc77f4b7095c51a (diff)
nb/intel/haswell/gma.c: Add ULX PCI device IDs
Change-Id: Ida3d2dcdf89342b084c8e1fbf3fae7e47a7238d2 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50137 Reviewed-by: Jamal Wright <Crabstorage@getbackinthe.kitchen> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/northbridge')
-rw-r--r--src/northbridge/intel/haswell/gma.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/northbridge/intel/haswell/gma.c b/src/northbridge/intel/haswell/gma.c
index de82e3a304..ccabb8cfa3 100644
--- a/src/northbridge/intel/haswell/gma.c
+++ b/src/northbridge/intel/haswell/gma.c
@@ -485,6 +485,8 @@ static const unsigned short pci_device_ids[] = {
0x0a06, /* ULT GT1 */
0x0a16, /* ULT GT2 */
0x0a26, /* ULT GT3 */
+ 0x0a0e, /* ULX GT1 */
+ 0x0a1e, /* ULX GT2 */
0,
};