diff options
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2016-12-05 06:33:32 +0200 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2016-12-06 20:44:12 +0100 |
| commit | 8db31a8f4eb247df86c658acb4cb7c5f97456e68 (patch) | |
| tree | b0d58cacb3174a50919cf11e8f751cec61261069 /src/northbridge | |
| parent | b4a45dcf9d442b311dec7396a55be917713a0d15 (diff) | |
PCI ops: Remove conflicting duplicate declarations
The code originates from times before __SIMPLE_DEVICE__ was
introduced. To keep behaviour unchanged, use explicit PCI
IO operations here.
Change-Id: I44851633115f9aee4c308fd3711571a4b14c5f2f
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/17720
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/northbridge')
| -rw-r--r-- | src/northbridge/amd/amdk8/reset_test.c | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/src/northbridge/amd/amdk8/reset_test.c b/src/northbridge/amd/amdk8/reset_test.c index 53f24339a3..d8734a9a72 100644 --- a/src/northbridge/amd/amdk8/reset_test.c +++ b/src/northbridge/amd/amdk8/reset_test.c @@ -13,7 +13,7 @@ static inline int cpu_init_detected(unsigned nodeid) pci_devfn_t dev; dev = PCI_DEV(0, 0x18 + nodeid, 0); - htic = pci_read_config32(dev, HT_INIT_CONTROL); + htic = pci_io_read_config32(dev, HT_INIT_CONTROL); return !!(htic & HTIC_INIT_Detect); } @@ -21,7 +21,7 @@ static inline int cpu_init_detected(unsigned nodeid) static inline int bios_reset_detected(void) { u32 htic; - htic = pci_read_config32(PCI_DEV(0, 0x18, 0), HT_INIT_CONTROL); + htic = pci_io_read_config32(PCI_DEV(0, 0x18, 0), HT_INIT_CONTROL); return (htic & HTIC_ColdR_Detect) && !(htic & HTIC_BIOSR_Detect); } @@ -29,7 +29,7 @@ static inline int bios_reset_detected(void) static inline int cold_reset_detected(void) { u32 htic; - htic = pci_read_config32(PCI_DEV(0, 0x18, 0), HT_INIT_CONTROL); + htic = pci_io_read_config32(PCI_DEV(0, 0x18, 0), HT_INIT_CONTROL); return !(htic & HTIC_ColdR_Detect); } @@ -39,18 +39,18 @@ static inline void distinguish_cpu_resets(unsigned nodeid) u32 htic; pci_devfn_t device; device = PCI_DEV(0, 0x18 + nodeid, 0); - htic = pci_read_config32(device, HT_INIT_CONTROL); + htic = pci_io_read_config32(device, HT_INIT_CONTROL); htic |= HTIC_ColdR_Detect | HTIC_BIOSR_Detect | HTIC_INIT_Detect; - pci_write_config32(device, HT_INIT_CONTROL, htic); + pci_io_write_config32(device, HT_INIT_CONTROL, htic); } void set_bios_reset(void); void set_bios_reset(void) { u32 htic; - htic = pci_read_config32(PCI_DEV(0, 0x18, 0), HT_INIT_CONTROL); + htic = pci_io_read_config32(PCI_DEV(0, 0x18, 0), HT_INIT_CONTROL); htic &= ~HTIC_BIOSR_Detect; - pci_write_config32(PCI_DEV(0, 0x18, 0), HT_INIT_CONTROL, htic); + pci_io_write_config32(PCI_DEV(0, 0x18, 0), HT_INIT_CONTROL, htic); } static unsigned node_link_to_bus(unsigned node, unsigned link) @@ -59,7 +59,7 @@ static unsigned node_link_to_bus(unsigned node, unsigned link) for (reg = 0xE0; reg < 0xF0; reg += 0x04) { u32 config_map; - config_map = pci_read_config32(PCI_DEV(0, 0x18, 1), reg); + config_map = pci_io_read_config32(PCI_DEV(0, 0x18, 1), reg); if ((config_map & 3) != 3) { continue; } @@ -76,7 +76,7 @@ static inline unsigned get_sblk(void) { u32 reg; /* read PCI_DEV(0,0x18,0) 0x64 bit [8:9] to find out SbLink m */ - reg = pci_read_config32(PCI_DEV(0, 0x18, 0), 0x64); + reg = pci_io_read_config32(PCI_DEV(0, 0x18, 0), 0x64); return ((reg>>8) & 3); } |