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authorStefan Reinauer <stepan@coresystems.de>2010-08-30 17:53:13 +0000
committerStefan Reinauer <stepan@openbios.org>2010-08-30 17:53:13 +0000
commit704b59662d8bf17cac387109a186cc6f702f27f9 (patch)
tree12de99d00ac98616d0d4df8b089603649a93b699 /src/northbridge
parent849498d4471003ff959e0151828abfe9a7be4621 (diff)
We call this cache as ram everywhere, so let's call it the same in Kconfig
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Myles Watson <mylesgw@gmail.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5756 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge')
-rw-r--r--src/northbridge/intel/e7501/debug.c32
-rw-r--r--src/northbridge/intel/i3100/raminit.c2
2 files changed, 17 insertions, 17 deletions
diff --git a/src/northbridge/intel/e7501/debug.c b/src/northbridge/intel/e7501/debug.c
index ed5fff140b..f19de0c1e7 100644
--- a/src/northbridge/intel/e7501/debug.c
+++ b/src/northbridge/intel/e7501/debug.c
@@ -39,7 +39,7 @@ static void dump_pci_device(unsigned dev)
for(i = 0; i < 256; i++) {
unsigned char val;
if ((i & 0x0f) == 0) {
-#if CONFIG_USE_DCACHE_RAM
+#if CONFIG_CACHE_AS_RAM
printk(BIOS_DEBUG, "\n%02x:",i);
#else
print_debug("\n");
@@ -48,7 +48,7 @@ static void dump_pci_device(unsigned dev)
#endif
}
val = pci_read_config8(dev, i);
-#if CONFIG_USE_DCACHE_RAM
+#if CONFIG_CACHE_AS_RAM
printk(BIOS_DEBUG, " %02x", val);
#else
print_debug_char(' ');
@@ -101,7 +101,7 @@ static inline void dump_spd_registers(const struct mem_controller *ctrl)
device = ctrl->channel0[i];
if (device) {
int j;
-#if CONFIG_USE_DCACHE_RAM
+#if CONFIG_CACHE_AS_RAM
printk(BIOS_DEBUG, "dimm: %02x.0: %02x", i, device);
#else
print_debug("dimm: ");
@@ -113,7 +113,7 @@ static inline void dump_spd_registers(const struct mem_controller *ctrl)
int status;
unsigned char byte;
if ((j & 0xf) == 0) {
-#if CONFIG_USE_DCACHE_RAM
+#if CONFIG_CACHE_AS_RAM
printk(BIOS_DEBUG, "\n%02x: ", j);
#else
print_debug("\n");
@@ -126,7 +126,7 @@ static inline void dump_spd_registers(const struct mem_controller *ctrl)
break;
}
byte = status & 0xff;
-#if CONFIG_USE_DCACHE_RAM
+#if CONFIG_CACHE_AS_RAM
printk(BIOS_DEBUG, "%02x ", byte);
#else
print_debug_hex8(byte);
@@ -138,7 +138,7 @@ static inline void dump_spd_registers(const struct mem_controller *ctrl)
device = ctrl->channel1[i];
if (device) {
int j;
-#if CONFIG_USE_DCACHE_RAM
+#if CONFIG_CACHE_AS_RAM
printk(BIOS_DEBUG, "dimm: %02x.1: %02x", i, device);
#else
print_debug("dimm: ");
@@ -150,7 +150,7 @@ static inline void dump_spd_registers(const struct mem_controller *ctrl)
int status;
unsigned char byte;
if ((j & 0xf) == 0) {
-#if CONFIG_USE_DCACHE_RAM
+#if CONFIG_CACHE_AS_RAM
printk(BIOS_DEBUG, "\n%02x: ", j);
#else
print_debug("\n");
@@ -163,7 +163,7 @@ static inline void dump_spd_registers(const struct mem_controller *ctrl)
break;
}
byte = status & 0xff;
-#if CONFIG_USE_DCACHE_RAM
+#if CONFIG_CACHE_AS_RAM
printk(BIOS_DEBUG, "%02x ", byte);
#else
print_debug_hex8(byte);
@@ -181,7 +181,7 @@ static inline void dump_smbus_registers(void)
for(device = 1; device < 0x80; device++) {
int j;
if( smbus_read_byte(device, 0) < 0 ) continue;
-#if CONFIG_USE_DCACHE_RAM
+#if CONFIG_CACHE_AS_RAM
printk(BIOS_DEBUG, "smbus: %02x", device);
#else
print_debug("smbus: ");
@@ -195,7 +195,7 @@ static inline void dump_smbus_registers(void)
break;
}
if ((j & 0xf) == 0) {
-#if CONFIG_USE_DCACHE_RAM
+#if CONFIG_CACHE_AS_RAM
printk(BIOS_DEBUG, "\n%02x: ",j);
#else
print_debug("\n");
@@ -204,7 +204,7 @@ static inline void dump_smbus_registers(void)
#endif
}
byte = status & 0xff;
-#if CONFIG_USE_DCACHE_RAM
+#if CONFIG_CACHE_AS_RAM
printk(BIOS_DEBUG, "%02x ", byte);
#else
print_debug_hex8(byte);
@@ -219,7 +219,7 @@ static inline void dump_io_resources(unsigned port)
{
int i;
-#if CONFIG_USE_DCACHE_RAM
+#if CONFIG_CACHE_AS_RAM
printk(BIOS_DEBUG, "%04x:\n", port);
#else
print_debug_hex16(port);
@@ -228,7 +228,7 @@ static inline void dump_io_resources(unsigned port)
for(i=0;i<256;i++) {
uint8_t val;
if ((i & 0x0f) == 0) {
-#if CONFIG_USE_DCACHE_RAM
+#if CONFIG_CACHE_AS_RAM
printk(BIOS_DEBUG, "%02x:", i);
#else
print_debug_hex8(i);
@@ -236,7 +236,7 @@ static inline void dump_io_resources(unsigned port)
#endif
}
val = inb(port);
-#if CONFIG_USE_DCACHE_RAM
+#if CONFIG_CACHE_AS_RAM
printk(BIOS_DEBUG, " %02x",val);
#else
print_debug_char(' ');
@@ -255,7 +255,7 @@ static inline void dump_mem(unsigned start, unsigned end)
print_debug("dump_mem:");
for(i=start;i<end;i++) {
if((i & 0xf)==0) {
-#if CONFIG_USE_DCACHE_RAM
+#if CONFIG_CACHE_AS_RAM
printk(BIOS_DEBUG, "\n%08x:", i);
#else
print_debug("\n");
@@ -263,7 +263,7 @@ static inline void dump_mem(unsigned start, unsigned end)
print_debug(":");
#endif
}
-#if CONFIG_USE_DCACHE_RAM
+#if CONFIG_CACHE_AS_RAM
printk(BIOS_DEBUG, " %02x", (unsigned char)*((unsigned char *)i));
#else
print_debug(" ");
diff --git a/src/northbridge/intel/i3100/raminit.c b/src/northbridge/intel/i3100/raminit.c
index 78e7b72f1f..5afddb7d9e 100644
--- a/src/northbridge/intel/i3100/raminit.c
+++ b/src/northbridge/intel/i3100/raminit.c
@@ -1212,7 +1212,7 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
pci_write_config16(ctrl->f0, MCHSCRB, data16);
/* The memory is now setup, use it */
-#if CONFIG_USE_DCACHE_RAM == 0
+#if CONFIG_CACHE_AS_RAM == 0
cache_lbmem(MTRR_TYPE_WRBACK);
#endif
}