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authorElyes Haouas <ehaouas@noos.fr>2024-04-09 13:11:07 +0200
committerElyes Haouas <ehaouas@noos.fr>2024-04-09 22:23:16 +0000
commit520dae19ea5d4da03b9c8a3e92da91d6d3556663 (patch)
treef27735595e58ce1d27b6951cf564d75ae67c613b /src/northbridge
parent54c9bf8e12240c8f91566b80462a8f8bdf1a5c16 (diff)
tree: Drop unused <delay.h>
Change-Id: I265e427254ce9f735e65b0631c43f98bc778a34f Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/81812 Reviewed-by: Jonathon Hall <jonathon.hall@puri.sm> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Varshit Pandya <pandyavarshit@gmail.com> Reviewed-by: Yidi Lin <yidilin@google.com>
Diffstat (limited to 'src/northbridge')
-rw-r--r--src/northbridge/intel/gm45/thermal.c1
-rw-r--r--src/northbridge/intel/haswell/native_raminit/raminit_main.c1
-rw-r--r--src/northbridge/intel/haswell/native_raminit/raminit_native.c1
3 files changed, 0 insertions, 3 deletions
diff --git a/src/northbridge/intel/gm45/thermal.c b/src/northbridge/intel/gm45/thermal.c
index 5264d48efb..2e3a97b6e9 100644
--- a/src/northbridge/intel/gm45/thermal.c
+++ b/src/northbridge/intel/gm45/thermal.c
@@ -4,7 +4,6 @@
#include <device/pci_def.h>
#include <spd.h>
-#include "delay.h"
#include "gm45.h"
void raminit_thermal(const sysinfo_t *sysinfo)
diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_main.c b/src/northbridge/intel/haswell/native_raminit/raminit_main.c
index b06330c4eb..19ec5859ac 100644
--- a/src/northbridge/intel/haswell/native_raminit/raminit_main.c
+++ b/src/northbridge/intel/haswell/native_raminit/raminit_main.c
@@ -3,7 +3,6 @@
#include <assert.h>
#include <console/console.h>
#include <cpu/intel/haswell/haswell.h>
-#include <delay.h>
#include <device/pci_ops.h>
#include <northbridge/intel/haswell/chip.h>
#include <northbridge/intel/haswell/haswell.h>
diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.c b/src/northbridge/intel/haswell/native_raminit/raminit_native.c
index ffb5e825f0..2fed93de5b 100644
--- a/src/northbridge/intel/haswell/native_raminit/raminit_native.c
+++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.c
@@ -6,7 +6,6 @@
#include <cf9_reset.h>
#include <console/console.h>
#include <cpu/x86/msr.h>
-#include <delay.h>
#include <device/pci_ops.h>
#include <mrc_cache.h>
#include <northbridge/intel/haswell/haswell.h>