diff options
author | Elyes Haouas <ehaouas@noos.fr> | 2022-10-02 13:48:07 +0200 |
---|---|---|
committer | Martin Roth <martin.roth@amd.corp-partner.google.com> | 2022-10-06 17:01:15 +0000 |
commit | 4114fdc9a81bdedced1e32085a7e1617e5ce1466 (patch) | |
tree | 2bdd2765f8dc375ec3fa27bf8245390f89487eef /src/northbridge | |
parent | ecb5e2db5259c51af22cff4c62b2e603a9264510 (diff) |
nb/intel/i945/raminit.c: Clean up includes and add <types.h>
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Change-Id: I94a81a30950cca6be5ba36a25f8bc6f87c2aad2f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68044
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@gmail.com>
Diffstat (limited to 'src/northbridge')
-rw-r--r-- | src/northbridge/intel/i945/raminit.c | 14 |
1 files changed, 8 insertions, 6 deletions
diff --git a/src/northbridge/intel/i945/raminit.c b/src/northbridge/intel/i945/raminit.c index ee5c54166e..0a4794ab90 100644 --- a/src/northbridge/intel/i945/raminit.c +++ b/src/northbridge/intel/i945/raminit.c @@ -1,22 +1,24 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include <cf9_reset.h> #include <console/console.h> #include <delay.h> -#include <device/pci_def.h> +#include <device/device.h> +#include <device/dram/ddr2.h> +#include <device/mmio.h> #include <device/pci_ops.h> +#include <device/pci_type.h> #include <device/smbus_host.h> -#include <cf9_reset.h> -#include <device/mmio.h> -#include <device/device.h> #include <lib.h> #include <pc80/mc146818rtc.h> #include <spd.h> #include <string.h> +#include <timestamp.h> +#include <types.h> + #include "raminit.h" #include "i945.h" #include "chip.h" -#include <device/dram/ddr2.h> -#include <timestamp.h> /* Debugging macros. */ #if CONFIG(DEBUG_RAM_SETUP) |