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authorAngel Pons <th3fanbus@gmail.com>2020-02-17 14:04:28 +0100
committerPatrick Georgi <pgeorgi@google.com>2020-03-15 13:04:39 +0000
commit31b7ee42016f7b54c24f30c271b4b93df16bfa10 (patch)
treeae4d33670204b4e09e228ff3d28385e76da7210d /src/northbridge
parent95de2317c6c6379e43d3b3c27d34eb66198dbe0a (diff)
treewide: Replace uses of "Nehalem"
The code in coreboot is actually for the Arrandale processors, which are a MCM (Multi-Chip Module) with two different dies: - Hillel: 32nm Westmere dual-core CPU - Ironlake: 45nm northbridge with integrated graphics This has nothing to do with the older, single-die Nehalem processors. Therefore, replace the references to Nehalem with the correct names. Change-Id: I8c10a2618c519d2411211b9b8f66d24f0018f908 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/38942 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/northbridge')
-rw-r--r--src/northbridge/intel/ironlake/northbridge.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/northbridge/intel/ironlake/northbridge.c b/src/northbridge/intel/ironlake/northbridge.c
index fe8eed36c9..91bcc1170b 100644
--- a/src/northbridge/intel/ironlake/northbridge.c
+++ b/src/northbridge/intel/ironlake/northbridge.c
@@ -263,10 +263,10 @@ static struct device_operations mc_ops = {
.ops_pci = &intel_pci_ops,
};
-static const struct pci_driver mc_driver_44 __pci_driver = {
+static const struct pci_driver mc_driver_ard __pci_driver = {
.ops = &mc_ops,
.vendor = PCI_VENDOR_ID_INTEL,
- .device = 0x0044, /* Nehalem */
+ .device = 0x0044, /* Arrandale DRAM controller */
};
static struct device_operations cpu_bus_ops = {
@@ -288,7 +288,7 @@ static void enable_dev(struct device *dev)
}
struct chip_operations northbridge_intel_ironlake_ops = {
- CHIP_NAME("Intel i7 (Nehalem) integrated Northbridge")
+ CHIP_NAME("Intel i7 (Arrandale) integrated Northbridge")
.enable_dev = enable_dev,
.init = ironlake_init,
};