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authorArthur Heymans <arthur@aheymans.xyz>2022-11-01 23:34:30 +0100
committerArthur Heymans <arthur@aheymans.xyz>2022-11-07 13:59:06 +0000
commit1a010236cf922fc28cfb36b604bdf17a9ea3cb82 (patch)
tree87ae44f39470ec8d753dc92957d49bb27150cc9f /src/northbridge
parent81a4fefce223ba358310aec2d988484202c176e2 (diff)
nb/amd/agesa: Remove leftover code
This code is now unused by any platform. Change-Id: I5464daa8cfb8231e2b19447c343fc80ab1d68ce8 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69119 Reviewed-by: Elyes Haouas <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/northbridge')
-rw-r--r--src/northbridge/amd/agesa/Kconfig34
1 files changed, 0 insertions, 34 deletions
diff --git a/src/northbridge/amd/agesa/Kconfig b/src/northbridge/amd/agesa/Kconfig
deleted file mode 100644
index 2ccfbbf410..0000000000
--- a/src/northbridge/amd/agesa/Kconfig
+++ /dev/null
@@ -1,34 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0-only
-
-config NORTHBRIDGE_AMD_AGESA
- bool
-
-if NORTHBRIDGE_AMD_AGESA
-
-config BOTTOMIO_POSITION
- hex "Bottom of 32-bit IO space"
- default 0x80000000
- help
- If PCI peripherals with big BARs are connected to the system
- the bottom of the IO must be decreased to allocate such devices.
-
- Declare the beginning of the 128MB-aligned MMIO region. This
- option is useful when PCI peripherals requesting large address
- ranges are present, for example, graphic cards.
-
-config CONSOLE_VGA_MULTI
- bool
- default n
-
-config S3_VGA_ROM_RUN
- bool
- default n
-
-source "src/northbridge/amd/agesa/*/Kconfig"
-
-# TODO: Reservation for heap seems excessive
-config HEAP_SIZE
- hex
- default 0xc0000
-
-endif # NORTHBRIDGE_AMD_AGESA