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authorAngel Pons <th3fanbus@gmail.com>2021-03-12 12:54:45 +0100
committerPatrick Georgi <pgeorgi@google.com>2021-03-15 06:00:10 +0000
commit0b39379c9c85d693b74ae7e954298bc4760285f3 (patch)
tree5ae80b57b8c2f3a6ae8a2f85dce996170cc52f8c /src/northbridge
parentae5ab1826ac404aedf807ff71b769334b89e92f2 (diff)
sb/intel/lynxpoint: Replace HPET_ADDR
The `HPET_ADDRESS` Kconfig option has the same value. Use it instead. Change-Id: I268e949d4396aa20e38f719b36cc4e6226efe082 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49743 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/northbridge')
-rw-r--r--src/northbridge/intel/haswell/romstage.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/northbridge/intel/haswell/romstage.c b/src/northbridge/intel/haswell/romstage.c
index fa3c523a27..7b4182e65e 100644
--- a/src/northbridge/intel/haswell/romstage.c
+++ b/src/northbridge/intel/haswell/romstage.c
@@ -56,7 +56,7 @@ void mainboard_romstage_entry(void)
.epbar = CONFIG_FIXED_EPBAR_MMIO_BASE,
.pciexbar = CONFIG_MMCONF_BASE_ADDRESS,
.smbusbar = CONFIG_FIXED_SMBUS_IO_BASE,
- .hpet_address = HPET_ADDR,
+ .hpet_address = CONFIG_HPET_ADDRESS,
.rcba = CONFIG_FIXED_RCBA_MMIO_BASE,
.pmbase = DEFAULT_PMBASE,
.gpiobase = DEFAULT_GPIOBASE,