diff options
| author | Martin Roth <martin.roth@se-eng.com> | 2014-12-08 10:53:19 -0700 |
|---|---|---|
| committer | Martin Roth <gaumless@gmail.com> | 2014-12-09 03:02:39 +0100 |
| commit | a0a71b046a44e6aa6e73469989b949db2e6a1a4d (patch) | |
| tree | 3bf36bbb76bc67e115ada8aedb99d67736659ee9 /src/northbridge | |
| parent | c43bce57f70bb740cf4e750018a7af7be29c6d6f (diff) | |
fsp platfoms: add prototype & consolidate main entry-point
- In '-ffreestanding' main() is just as any other function and so
it needs a type-signature. Fixes a clang warning.
- Bay Trail and Rangeley have the updated romstage.c with the code
moved into the chipset, put the prototype in romstage.c.
- The sandybridge code has not been updated, so the prototype
for it goes into chipset_fsp_util.h, next to the prototype for
romstage_main_continue.
- Correct the return value of baytrail main() from void * to void
and remove the unnecessary asmlinkage tag. I'm surprised that this
didn't generate a warning...
Change-Id: I85ac0797d1e55d2b7ffdca039a52820d7827e704
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-on: http://review.coreboot.org/7724
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
Diffstat (limited to 'src/northbridge')
| -rw-r--r-- | src/northbridge/intel/fsp_sandybridge/fsp/chipset_fsp_util.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/northbridge/intel/fsp_sandybridge/fsp/chipset_fsp_util.h b/src/northbridge/intel/fsp_sandybridge/fsp/chipset_fsp_util.h index 23749430eb..f05b0fcd74 100644 --- a/src/northbridge/intel/fsp_sandybridge/fsp/chipset_fsp_util.h +++ b/src/northbridge/intel/fsp_sandybridge/fsp/chipset_fsp_util.h @@ -60,6 +60,9 @@ #define FSP_IMAGE_ID_DWORD1 0x00505346 #endif +#ifdef __PRE_RAM__ +void main(FSP_INFO_HEADER *fsp_info_header); void romstage_main_continue(EFI_STATUS status, VOID *HobListPtr); +#endif #endif /* CHIPSET_FSP_UTIL_H */ |