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authorKyösti Mälkki <kyosti.malkki@gmail.com>2015-09-12 00:20:25 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2015-09-14 10:00:58 +0000
commit98e0ac00b9cd5a1ba87b2e965584a37078c58e42 (patch)
tree08a1302f9640e38a8cde989f84a9eee8c17f7cb3 /src/northbridge
parent113d821696c25f508e2b98c3ecd749e3c92ac118 (diff)
AGESA S3 support: Fix excessive stack usage
Commit 300caced9 introduced stack overflow when HAVE_ACPI_RESUME is selected as the temporary storage for MTRRs is 4KiB. Change-Id: I993df6abc04436fb135822729c4931c5c7496e5a Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/11633 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/northbridge')
-rw-r--r--src/northbridge/amd/agesa/oem_s3.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/northbridge/amd/agesa/oem_s3.c b/src/northbridge/amd/agesa/oem_s3.c
index 5f02815636..f9ce4a79f5 100644
--- a/src/northbridge/amd/agesa/oem_s3.c
+++ b/src/northbridge/amd/agesa/oem_s3.c
@@ -115,6 +115,8 @@ static int spi_SaveS3info(u32 pos, u32 size, u8 *buf, u32 len)
#endif
}
+static u8 MTRRStorage[S3_DATA_MTRR_SIZE];
+
AGESA_STATUS OemS3Save(void *vS3SaveParams)
{
#if IS_ENABLED(CONFIG_CPU_AMD_PI_00660F01)
@@ -124,7 +126,6 @@ AGESA_STATUS OemS3Save(void *vS3SaveParams)
AMD_S3SAVE_PARAMS *S3SaveParams = (AMD_S3SAVE_PARAMS *)vS3SaveParams;
AMD_S3_PARAMS *dataBlock = &S3SaveParams->S3DataBlock;
#endif
- u8 MTRRStorage[S3_DATA_MTRR_SIZE];
u32 MTRRStorageSize = 0;
uintptr_t pos, size;