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authorKyösti Mälkki <kyosti.malkki@gmail.com>2012-08-27 20:00:33 +0300
committerAlexandru Gagniuc <mr.nuke.me@gmail.com>2012-08-28 23:27:10 +0200
commit87213b655eaa09522366f92088f94913024b6ef9 (patch)
treed285ad9e810a650a022efeaa0fdc142ec62bfc7f /src/northbridge
parent71c7a3fdc34b013c05d7de08728dfae4064d1946 (diff)
Fix AMD UMA for RS780
In commit 6b5eb1cc2d1702ff10cd02249d3d861c094f9118 setup of UMA memory region was moved to happen at a later state and this broke UMA with RS780 southbridge. Share the TOP_MEM and UMA settings before any of the PCI or CPU scanning takes place. Change-Id: I9cae1fc2948cbccede58d099faf1dfe49e9df303 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/1488 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Dave Frodin <dave.frodin@se-eng.com> Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
Diffstat (limited to 'src/northbridge')
-rw-r--r--src/northbridge/amd/agesa/family10/northbridge.c18
-rw-r--r--src/northbridge/amd/agesa/family12/northbridge.c13
-rw-r--r--src/northbridge/amd/agesa/family14/northbridge.c16
-rw-r--r--src/northbridge/amd/agesa/family15/northbridge.c13
-rw-r--r--src/northbridge/amd/agesa/family15tn/northbridge.c13
-rw-r--r--src/northbridge/amd/amdfam10/northbridge.c13
-rw-r--r--src/northbridge/amd/amdk8/northbridge.c13
7 files changed, 75 insertions, 24 deletions
diff --git a/src/northbridge/amd/agesa/family10/northbridge.c b/src/northbridge/amd/agesa/family10/northbridge.c
index 01240761ca..2bea5d1c78 100644
--- a/src/northbridge/amd/agesa/family10/northbridge.c
+++ b/src/northbridge/amd/agesa/family10/northbridge.c
@@ -923,11 +923,6 @@ static void amdfam10_domain_set_resources(device_t dev)
u32 reset_memhole = 1;
#endif
- setup_bsp_ramtop();
-#if CONFIG_GFXUMA
-#error Northbridge does not set uma_memory_base or uma_memory_size.
-#endif
-
#if CONFIG_PCI_64BIT_PREF_MEM
for (link = dev->link_list; link; link = link->next) {
@@ -1439,6 +1434,19 @@ static struct device_operations cpu_bus_ops = {
static void root_complex_enable_dev(struct device *dev)
{
+ static int done = 0;
+
+ /* Do not delay UMA setup, as a device on the PCI bus may evaluate
+ the global uma_memory variables already in its enable function. */
+ if (!done) {
+ setup_bsp_ramtop();
+#if CONFIG_GFXUMA
+#error Northbridge does not set uma_memory_base or uma_memory_size.
+ setup_uma_memory();
+#endif
+ done = 1;
+ }
+
/* Set the operations if it is a special bus type */
if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) {
dev->ops = &pci_domain_ops;
diff --git a/src/northbridge/amd/agesa/family12/northbridge.c b/src/northbridge/amd/agesa/family12/northbridge.c
index 6689e71f88..7f1478714b 100644
--- a/src/northbridge/amd/agesa/family12/northbridge.c
+++ b/src/northbridge/amd/agesa/family12/northbridge.c
@@ -601,9 +601,6 @@ static void domain_set_resources(device_t dev)
u32 reset_memhole = 1;
#endif
- setup_bsp_ramtop();
- setup_uma_memory();
-
#if CONFIG_PCI_64BIT_PREF_MEM
printk(BIOS_DEBUG, "adsr - CONFIG_PCI_64BIT_PREF_MEM is true.\n");
@@ -914,6 +911,16 @@ static struct device_operations cpu_bus_ops = {
static void root_complex_enable_dev(struct device *dev)
{
printk(BIOS_DEBUG, "\nFam12h - northbridge.c - root_complex_enable_dev - Start.\n");
+ static int done = 0;
+
+ /* Do not delay UMA setup, as a device on the PCI bus may evaluate
+ the global uma_memory variables already in its enable function. */
+ if (!done) {
+ setup_bsp_ramtop();
+ setup_uma_memory();
+ done = 1;
+ }
+
/* Set the operations if it is a special bus type */
if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) {
dev->ops = &pci_domain_ops;
diff --git a/src/northbridge/amd/agesa/family14/northbridge.c b/src/northbridge/amd/agesa/family14/northbridge.c
index 8742f11904..7ff9adfbba 100644
--- a/src/northbridge/amd/agesa/family14/northbridge.c
+++ b/src/northbridge/amd/agesa/family14/northbridge.c
@@ -564,9 +564,6 @@ static void domain_set_resources(device_t dev)
u32 reset_memhole = 1;
#endif
- setup_bsp_ramtop();
- setup_uma_memory();
-
#if CONFIG_PCI_64BIT_PREF_MEM
printk(BIOS_DEBUG, "adsr - CONFIG_PCI_64BIT_PREF_MEM is true.\n");
@@ -895,7 +892,18 @@ static struct device_operations cpu_bus_ops = {
.scan_bus = cpu_bus_scan,
};
-static void root_complex_enable_dev(struct device *dev) {
+static void root_complex_enable_dev(struct device *dev)
+{
+ static int done = 0;
+
+ /* Do not delay UMA setup, as a device on the PCI bus may evaluate
+ the global uma_memory variables already in its enable function. */
+ if (!done) {
+ setup_bsp_ramtop();
+ setup_uma_memory();
+ done = 1;
+ }
+
/* Set the operations if it is a special bus type */
if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) {
dev->ops = &pci_domain_ops;
diff --git a/src/northbridge/amd/agesa/family15/northbridge.c b/src/northbridge/amd/agesa/family15/northbridge.c
index 742ef890cf..da67af42b0 100644
--- a/src/northbridge/amd/agesa/family15/northbridge.c
+++ b/src/northbridge/amd/agesa/family15/northbridge.c
@@ -673,9 +673,6 @@ static void domain_set_resources(device_t dev)
u32 reset_memhole = 1;
#endif
- setup_bsp_ramtop();
- setup_uma_memory();
-
#if CONFIG_PCI_64BIT_PREF_MEM
for (link = dev->link_list; link; link = link->next) {
@@ -1126,6 +1123,16 @@ static struct device_operations cpu_bus_ops = {
static void root_complex_enable_dev(struct device *dev)
{
+ static int done = 0;
+
+ /* Do not delay UMA setup, as a device on the PCI bus may evaluate
+ the global uma_memory variables already in its enable function. */
+ if (!done) {
+ setup_bsp_ramtop();
+ setup_uma_memory();
+ done = 1;
+ }
+
/* Set the operations if it is a special bus type */
if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) {
dev->ops = &pci_domain_ops;
diff --git a/src/northbridge/amd/agesa/family15tn/northbridge.c b/src/northbridge/amd/agesa/family15tn/northbridge.c
index 063afa9895..5d50b09b88 100644
--- a/src/northbridge/amd/agesa/family15tn/northbridge.c
+++ b/src/northbridge/amd/agesa/family15tn/northbridge.c
@@ -684,9 +684,6 @@ static void domain_set_resources(device_t dev)
u32 reset_memhole = 1;
#endif
- setup_bsp_ramtop();
- setup_uma_memory();
-
#if CONFIG_PCI_64BIT_PREF_MEM
for (link = dev->link_list; link; link = link->next) {
@@ -1133,6 +1130,16 @@ static struct device_operations cpu_bus_ops = {
static void root_complex_enable_dev(struct device *dev)
{
+ static int done = 0;
+
+ /* Do not delay UMA setup, as a device on the PCI bus may evaluate
+ the global uma_memory variables already in its enable function. */
+ if (!done) {
+ setup_bsp_ramtop();
+ setup_uma_memory();
+ done = 1;
+ }
+
/* Set the operations if it is a special bus type */
if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) {
dev->ops = &pci_domain_ops;
diff --git a/src/northbridge/amd/amdfam10/northbridge.c b/src/northbridge/amd/amdfam10/northbridge.c
index c73b38c8a4..a30bd91791 100644
--- a/src/northbridge/amd/amdfam10/northbridge.c
+++ b/src/northbridge/amd/amdfam10/northbridge.c
@@ -888,9 +888,6 @@ static void amdfam10_domain_set_resources(device_t dev)
u32 reset_memhole = 1;
#endif
- setup_bsp_ramtop();
- setup_uma_memory();
-
#if CONFIG_PCI_64BIT_PREF_MEM
for(link = dev->link_list; link; link = link->next) {
@@ -1463,6 +1460,16 @@ static struct device_operations cpu_bus_ops = {
static void root_complex_enable_dev(struct device *dev)
{
+ static int done = 0;
+
+ /* Do not delay UMA setup, as a device on the PCI bus may evaluate
+ the global uma_memory variables already in its enable function. */
+ if (!done) {
+ setup_bsp_ramtop();
+ setup_uma_memory();
+ done = 1;
+ }
+
/* Set the operations if it is a special bus type */
if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) {
dev->ops = &pci_domain_ops;
diff --git a/src/northbridge/amd/amdk8/northbridge.c b/src/northbridge/amd/amdk8/northbridge.c
index 9f2fe66c29..eba018fa3e 100644
--- a/src/northbridge/amd/amdk8/northbridge.c
+++ b/src/northbridge/amd/amdk8/northbridge.c
@@ -884,9 +884,6 @@ static void amdk8_domain_set_resources(device_t dev)
u32 reset_memhole = 1;
#endif
- setup_bsp_ramtop();
- setup_uma_memory();
-
#if 0
/* Place the IO devices somewhere safe */
io = find_resource(dev, 0);
@@ -1349,6 +1346,16 @@ static struct device_operations cpu_bus_ops = {
static void root_complex_enable_dev(struct device *dev)
{
+ static int done = 0;
+
+ /* Do not delay UMA setup, as a device on the PCI bus may evaluate
+ the global uma_memory variables already in its enable function. */
+ if (!done) {
+ setup_bsp_ramtop();
+ setup_uma_memory();
+ done = 1;
+ }
+
/* Set the operations if it is a special bus type */
if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) {
dev->ops = &pci_domain_ops;