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authorNico Huber <nico.huber@secunet.com>2019-05-10 16:48:14 +0200
committerNico Huber <nico.h@gmx.de>2019-05-12 15:03:03 +0000
commit772a154d39025e5f7f30102cca9f935e9b35cb1c (patch)
tree18ed0dd7b83f580f6587403938e967e618b3cff6 /src/northbridge
parent47953d0ae066ad05a62e3dc5ae560e3a6796d035 (diff)
nb/intel/snb: Drop NORTHBRIDGE_INTEL_IVYBRIDGE
We keep the support, though. Just now that `libgfxinit` is fixed, we don't need the distinction anymore. Causally, we also don't need CPU_INTEL_MODEL_306AX any more. TEST=Played tint on kontron/ktqm77. Score 606 Change-Id: Id1e33c77f44a66baacba375cbb2aeb71effb7b76 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32737 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/northbridge')
-rw-r--r--src/northbridge/intel/sandybridge/Kconfig11
-rw-r--r--src/northbridge/intel/sandybridge/Makefile.inc2
2 files changed, 2 insertions, 11 deletions
diff --git a/src/northbridge/intel/sandybridge/Kconfig b/src/northbridge/intel/sandybridge/Kconfig
index b3827c0d4c..4f9da000a4 100644
--- a/src/northbridge/intel/sandybridge/Kconfig
+++ b/src/northbridge/intel/sandybridge/Kconfig
@@ -23,16 +23,7 @@ config NORTHBRIDGE_INTEL_SANDYBRIDGE
select POSTCAR_STAGE
select POSTCAR_CONSOLE
-config NORTHBRIDGE_INTEL_IVYBRIDGE
- bool
- select CACHE_MRC_SETTINGS
- select CPU_INTEL_MODEL_306AX
- select HAVE_DEBUG_RAM_SETUP
- select INTEL_GMA_ACPI
- select POSTCAR_STAGE
- select POSTCAR_CONSOLE
-
-if NORTHBRIDGE_INTEL_IVYBRIDGE || NORTHBRIDGE_INTEL_SANDYBRIDGE
+if NORTHBRIDGE_INTEL_SANDYBRIDGE
config VBOOT
select VBOOT_STARTS_IN_ROMSTAGE
diff --git a/src/northbridge/intel/sandybridge/Makefile.inc b/src/northbridge/intel/sandybridge/Makefile.inc
index ecab18a818..cc4ddaf861 100644
--- a/src/northbridge/intel/sandybridge/Makefile.inc
+++ b/src/northbridge/intel/sandybridge/Makefile.inc
@@ -13,7 +13,7 @@
# GNU General Public License for more details.
#
-ifeq ($(CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE)$(CONFIG_NORTHBRIDGE_INTEL_IVYBRIDGE),y)
+ifeq ($(CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE),y)
ramstage-y += ram_calc.c
ramstage-y += northbridge.c