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authorDavid Hendricks <dhendrix@chromium.org>2015-07-30 18:49:48 -0700
committerPatrick Georgi <pgeorgi@google.com>2015-08-28 06:42:03 +0000
commit7dbf9c6747ccdfa8b993d3843a22722742957611 (patch)
treea069e96ccfc13888c6df8a3d91a5864fc8acbc8e /src/northbridge
parenta3b898aaf0ddf48fc3a577f4c39dd1d8acf31b6f (diff)
edid: Use edid_mode struct to reduce redundancy
This replaces various timing mode parameters parameters with an edid_mode struct within the edid struct. BUG=none BRANCH=firmware-veyron TEST=built and booted on Mickey, saw display come up, also compiled for link,falco,peppy,rambi,nyan_big,rush,smaug [pg: extended to also cover peach_pit, daisy and lenovo/t530] Change-Id: Icd0d67bfd3c422be087976261806b9525b2b9c7e Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Original-Commit-Id: abcbf25c81b25fadf71cae106e01b3e36391f5e9 Original-Change-Id: I1bfba5b06a708d042286db56b37f67302f61fff6 Original-Signed-off-by: David Hendricks <dhendrix@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/289964 Original-Reviewed-by: Yakir Yang <ykk@rock-chips.com> Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-on: http://review.coreboot.org/11388 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/northbridge')
-rw-r--r--src/northbridge/intel/sandybridge/gma_ivybridge_lvds.c28
1 files changed, 14 insertions, 14 deletions
diff --git a/src/northbridge/intel/sandybridge/gma_ivybridge_lvds.c b/src/northbridge/intel/sandybridge/gma_ivybridge_lvds.c
index a9648bb8d8..65719d115e 100644
--- a/src/northbridge/intel/sandybridge/gma_ivybridge_lvds.c
+++ b/src/northbridge/intel/sandybridge/gma_ivybridge_lvds.c
@@ -216,22 +216,22 @@ int i915lightup_sandy(const struct i915_gpu_controller_info *info,
u32 hactive = edid.x_resolution;
u32 vactive = edid.y_resolution;
- u32 right_border = edid.hborder;
- u32 bottom_border = edid.vborder;
- int hpolarity = (edid.phsync == '-');
- int vpolarity = (edid.pvsync == '-');
- u32 vsync = edid.vspw;
- u32 hsync = edid.hspw;
- u32 vblank = edid.vbl;
- u32 hblank = edid.hbl;
- u32 hfront_porch = edid.hso;
- u32 vfront_porch = edid.vso;
+ u32 right_border = edid.mode.hborder;
+ u32 bottom_border = edid.mode.vborder;
+ int hpolarity = (edid.mode.phsync == '-');
+ int vpolarity = (edid.mode.pvsync == '-');
+ u32 vsync = edid.mode.vspw;
+ u32 hsync = edid.mode.hspw;
+ u32 vblank = edid.mode.vbl;
+ u32 hblank = edid.mode.hbl;
+ u32 hfront_porch = edid.mode.hso;
+ u32 vfront_porch = edid.mode.vso;
u32 candp1, candn;
u32 best_delta = 0xffffffff;
- u32 target_frequency = info->lvds_dual_channel ? edid.pixel_clock
- : (2 * edid.pixel_clock);
+ u32 target_frequency = info->lvds_dual_channel ? edid.mode.pixel_clock
+ : (2 * edid.mode.pixel_clock);
u32 pixel_p1 = 1;
u32 pixel_n = 1;
u32 pixel_m1 = 1;
@@ -308,9 +308,9 @@ int i915lightup_sandy(const struct i915_gpu_controller_info *info,
u32 link_m1;
u32 link_n1 = 0x00080000;
- link_m1 = ((uint64_t)link_n1 * edid.pixel_clock) / link_frequency;
+ link_m1 = ((uint64_t)link_n1 * edid.mode.pixel_clock) / link_frequency;
- data_m1 = ((uint64_t)data_n1 * 18 * edid.pixel_clock)
+ data_m1 = ((uint64_t)data_n1 * 18 * edid.mode.pixel_clock)
/ (link_frequency * 8 * (info->lvds_num_lanes ? : 1));
printk(BIOS_INFO, "bringing up panel at resolution %d x %d\n",