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authorArthur Heymans <arthur@aheymans.xyz>2017-01-03 00:49:45 +0100
committerMartin Roth <martinroth@google.com>2017-01-22 20:23:17 +0100
commiteee4f6b224b897184327539fcbeb23f9b26f02d9 (patch)
tree4b16cd646deb66fdcfdde8954798b1698666e155 /src/northbridge/via
parentacbb70b810c6eb17e403c37fa2888b479e5b23a9 (diff)
nb/x4x/raminit: Fix programming dram timings
The results were obtained by comparing the MCHBAR registers of vendor bios with coreboot at the same dram timings. This fixes 2 issues: * 1333MHz fsb CPUs were limited to 667MHz ddr2 speeds, because with 800MHz raminit failed; * 1067MHz fsb CPUs did not boot when second dimm slot was populated. TESTED on ga-g41m-es2l on 800, 1067 and 1333MHz CPUs with DDR2 667 and 800MHz dimms. Change-Id: I70f554f97b44947c2c78713b4d73a47c06d7ba60 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/18022 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber <nico.h@gmx.de>
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