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authorElyes HAOUAS <ehaouas@noos.fr>2018-10-17 10:56:26 +0200
committerPatrick Georgi <pgeorgi@google.com>2018-10-23 15:52:09 +0000
commita342f3937e7ce159fd170ab8cd26ba799a3bc9e4 (patch)
tree4bd4540ba11286f465272c1fbee62dbf5f9789f8 /src/northbridge/via/vx900
parent9856892297ad997f586a1b4dd0a494f3764a0ce2 (diff)
src: Remove unneeded whitespace
Change-Id: I6c77f4289b46646872731ef9c20dc115f0cf876d Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/29161 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/northbridge/via/vx900')
-rw-r--r--src/northbridge/via/vx900/chrome9hd.c18
1 files changed, 9 insertions, 9 deletions
diff --git a/src/northbridge/via/vx900/chrome9hd.c b/src/northbridge/via/vx900/chrome9hd.c
index 254be7b886..494d78a364 100644
--- a/src/northbridge/via/vx900/chrome9hd.c
+++ b/src/northbridge/via/vx900/chrome9hd.c
@@ -105,15 +105,15 @@ u8 vx900_int15_get_5f18_bl(void)
* 0000: 66MHz
* 0001: 100MHz
* 0010: 133MHz
- * 0011: 200MHz ( DDR200 )
- * 0100: 266MHz ( DDR266 )
- * 0101: 333MHz ( DDR333 )
- * 0110: 400MHz ( DDR400 )
- * 0111: 533MHz ( DDR I/II 533)
- * 1000: 667MHz ( DDR I/II 667)
- * 1001: 800MHz ( DDR3 800)
- * 1010: 1066MHz ( DDR3 1066)
- * 1011: 1333MHz ( DDR3 1333)
+ * 0011: 200MHz (DDR200)
+ * 0100: 266MHz (DDR266)
+ * 0101: 333MHz (DDR333)
+ * 0110: 400MHz (DDR400)
+ * 0111: 533MHz (DDR I/II 533)
+ * 1000: 667MHz (DDR I/II 667)
+ * 1001: 800MHz (DDR3 800)
+ * 1010: 1066MHz (DDR3 1066)
+ * 1011: 1333MHz (DDR3 1333)
* Bit[3:0]
* N: Frame Buffer Size 2^N MB
*/