diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2016-10-02 11:56:39 +0200 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-10-04 19:15:55 +0200 |
| commit | 7db506c3dd70f9ac0e8cdc481a47fa3835538be2 (patch) | |
| tree | 954275c199955bdee8b7b0d08aaba698e230f34e /src/northbridge/via/vx900/pcie.c | |
| parent | fb190ed764450208c393a43da4ab15b0f9ccbe58 (diff) | |
src/northbridge: Remove unnecessary whitespace
Change-Id: Ib06ecd083f00c74f1d227368811729d2944dd1ef
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16851
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/northbridge/via/vx900/pcie.c')
| -rw-r--r-- | src/northbridge/via/vx900/pcie.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/northbridge/via/vx900/pcie.c b/src/northbridge/via/vx900/pcie.c index f717384e8f..ae81739185 100644 --- a/src/northbridge/via/vx900/pcie.c +++ b/src/northbridge/via/vx900/pcie.c @@ -52,7 +52,7 @@ static void vx900_pcie_link_init(device_t dev) /* Step 2: Wait for device to enter L0 state */ /* FIXME: implement timeout detection */ - while (0x8a != pci_read_config8(dev, 0x1c3)) ; + while (0x8a != pci_read_config8(dev, 0x1c3)); /* Step 3: Clear PCIe error status, then check for failures */ pci_write_config32(dev, 0x104, 0xffffffff); |