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| author | Uwe Hermann <uwe@hermann-uwe.de> | 2009-05-27 18:55:19 +0000 |
|---|---|---|
| committer | Uwe Hermann <uwe@hermann-uwe.de> | 2009-05-27 18:55:19 +0000 |
| commit | 7365004424f58db813a092c24c404ec99507765f (patch) | |
| tree | a295b73549800b36b6e53458b5c8ee7cf6ff2a97 /src/northbridge/via/vx800/dram_init.h | |
| parent | 5c044c732fc28b09eb58956a85b141af194f2b94 (diff) | |
First batch of indent-aided code cleanups, more will follow.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4318 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge/via/vx800/dram_init.h')
| -rw-r--r-- | src/northbridge/via/vx800/dram_init.h | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/src/northbridge/via/vx800/dram_init.h b/src/northbridge/via/vx800/dram_init.h index e7f5e72d50..50007c18a7 100644 --- a/src/northbridge/via/vx800/dram_init.h +++ b/src/northbridge/via/vx800/dram_init.h @@ -74,7 +74,6 @@ //#define DATAWIDTHX8 8 //#define DATAWIDTHX4 4 - #define SPD_MEMORY_TYPE 2 /*Memory type FPM,EDO,SDRAM,DDR,DDR2 */ #define SPD_SDRAM_ROW_ADDR 3 /*Number of row addresses on this assembly */ #define SPD_SDRAM_COL_ADDR 4 /*Number of column addresses on this assembly */ @@ -244,7 +243,6 @@ void DRAMBankInterleave(DRAM_SYS_ATTR * DramAttr); /*Step14 Sizing*/ void DRAMSizingMATypeM(DRAM_SYS_ATTR * DramAttr); - //final_setting.c /*Step15 DDR fresh counter setting*/ void DRAMRefreshCounter(DRAM_SYS_ATTR * DramAttr); @@ -253,7 +251,6 @@ void DRAMRefreshCounter(DRAM_SYS_ATTR * DramAttr); /*Step16 Final register setting for improve performance*/ void DRAMRegFinalValue(DRAM_SYS_ATTR * DramAttr); - /*set UMA*/ void SetUMARam(); |