diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2016-09-02 19:22:00 +0200 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-09-12 20:08:19 +0200 |
| commit | 6e8b3c11105682e58ccb0574148654adecc532f7 (patch) | |
| tree | bcd395a865e9d3f981e5ef9e99ff7b8bbfea3fe5 /src/northbridge/via/vx800/detection.c | |
| parent | 6b72787d270077969869e9b17b88a63539f172b4 (diff) | |
src/northbridge: Improve code formatting
Change-Id: Iffa058d9eb1e96a4d1587dc3f8a1740907ffbb32
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16414
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/northbridge/via/vx800/detection.c')
| -rw-r--r-- | src/northbridge/via/vx800/detection.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/src/northbridge/via/vx800/detection.c b/src/northbridge/via/vx800/detection.c index c2397c84b2..ce643a0059 100644 --- a/src/northbridge/via/vx800/detection.c +++ b/src/northbridge/via/vx800/detection.c @@ -146,16 +146,16 @@ CB_STATUS GetInfoFromSPD(DRAM_SYS_ATTR *DramAttr) LoadNum = (u8) (ModuleDataWidth / ChipWidth); /* Set the RANK map. */ - /* Get bit0,1, the most number of supported RANK is 2. */ + /* Get bit0,1, the most number of supported RANK is 2. */ RankNum = (u8) (pSPDDataBuf[SPD_SDRAM_DIMM_RANKS] & 0x3); if (RAMTYPE_SDRAMDDR2 == DramAttr->DramType) - /* - * For DDR bit[0,1]: 01->1 RANK, 10->2 RANK - * For DDR2 bit[0,1]: 00->1 RANK, 01->2 RANK - */ + /* + * For DDR bit[0,1]: 01->1 RANK, 10->2 RANK + * For DDR2 bit[0,1]: 00->1 RANK, 01->2 RANK + */ RankNum++; - /* Every DIMM have 1 or 2 ranks. */ + /* Every DIMM have 1 or 2 ranks. */ if (RankNum != 2 && RankNum != 1) { Status = CB_DEVICE_ERROR; PRINT_DEBUG_MEM("Memory Device ERROR: Number " |