diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2016-10-05 21:02:23 +0200 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-10-09 21:36:47 +0200 |
| commit | e7aeb2f60212077521f7d71a4f485c8f4a26f6c6 (patch) | |
| tree | 2c9b89bd9d2bd173aaee4f7e36e65217573d1fc7 /src/northbridge/via/cx700 | |
| parent | 83b9703505becf34728a2286a3ad3e6749a4d619 (diff) | |
src/northbridge/via: Remove commented code
Change-Id: Ic589b26c6c94df12e1fe218d079018db8b38fbd9
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16898
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/northbridge/via/cx700')
| -rw-r--r-- | src/northbridge/via/cx700/early_smbus.c | 6 | ||||
| -rw-r--r-- | src/northbridge/via/cx700/lpc.c | 2 | ||||
| -rw-r--r-- | src/northbridge/via/cx700/raminit.c | 8 |
3 files changed, 0 insertions, 16 deletions
diff --git a/src/northbridge/via/cx700/early_smbus.c b/src/northbridge/via/cx700/early_smbus.c index 44aa743f88..b501baf3a3 100644 --- a/src/northbridge/via/cx700/early_smbus.c +++ b/src/northbridge/via/cx700/early_smbus.c @@ -102,7 +102,6 @@ static void smbus_reset(void) /* Public functions */ static void set_ics_data(unsigned char dev, int data, char len) { - //int i; smbus_reset(); /* clear host data port */ outb(0x00, SMBHSTDAT0); @@ -114,7 +113,6 @@ static void set_ics_data(unsigned char dev, int data, char len) /* fill blocktransfer array */ if (dev == 0xd2) { - //char d2_data[] = {0x0d,0x00,0x3f,0xcd,0x7f,0xbf,0x1a,0x2a,0x01,0x0f,0x0b,0x00,0x8d,0x9b}; outb(0x0d, SMBBLKDAT); outb(0x00, SMBBLKDAT); outb(0x3f, SMBBLKDAT); @@ -130,7 +128,6 @@ static void set_ics_data(unsigned char dev, int data, char len) outb(0x8d, SMBBLKDAT); outb(0x9b, SMBBLKDAT); } else { - //char d4_data[] = {0x08,0xff,0x3f,0x00,0x00,0xff,0xff,0xff,0xff}; outb(0x08, SMBBLKDAT); outb(0xff, SMBBLKDAT); outb(0x3f, SMBBLKDAT); @@ -142,9 +139,6 @@ static void set_ics_data(unsigned char dev, int data, char len) outb(0xff, SMBBLKDAT); } - //for (i = 0; i < len; i++) - // outb(data[i],SMBBLKDAT); - outb(dev, SMBXMITADD); outb(0, SMBHSTCMD); outb(len, SMBHSTDAT0); diff --git a/src/northbridge/via/cx700/lpc.c b/src/northbridge/via/cx700/lpc.c index e9e4d98e33..c90dab7b84 100644 --- a/src/northbridge/via/cx700/lpc.c +++ b/src/northbridge/via/cx700/lpc.c @@ -110,7 +110,6 @@ static void setup_pm(device_t dev) /* GP2 Timer Counter */ pci_write_config8(dev, 0x99, 0xfb); /* GP3 Timer Counter */ - //pci_write_config8(dev, 0x9a, 0x20); /* Multi Function Select 1 */ pci_write_config8(dev, 0xe4, 0x00); @@ -169,7 +168,6 @@ static void cx700_set_lpc_registers(struct device *dev) pci_write_config8(dev, 0x6C, enables); // Map 4MB of FLASH into the address space -// pci_write_config8(dev, 0x41, 0x7f); // Set bit 6 of 0x40, because Award does it (IO recovery time) // IMPORTANT FIX - EISA 0x4d0 decoding must be on so that PCI diff --git a/src/northbridge/via/cx700/raminit.c b/src/northbridge/via/cx700/raminit.c index aad851d929..f8d709c135 100644 --- a/src/northbridge/via/cx700/raminit.c +++ b/src/northbridge/via/cx700/raminit.c @@ -815,7 +815,6 @@ static void sdram_set_safe_values(const struct mem_controller *ctrl) /* Clock Phase Control for FeedBack Mode */ regs = pci_read_config8(MEMCTRL, 0x90); -// regs |= 0x80; pci_write_config8(MEMCTRL, 0x90, regs); regs = pci_read_config8(PCI_DEV(0, 0, 4), SCRATCH_DRAM_FREQ); @@ -1343,13 +1342,6 @@ static void sdram_enable(const struct mem_controller *ctrl) /****************************************************************/ /* Find out the lowest Bank Interleave and Set Register */ /****************************************************************/ -#if 0 - //TODO - reg8 = pci_read_config8(MEMCTRL, 0x69); - reg8 &= ~0xc0; - reg8 |= 0x80; //8 banks - pci_write_config8(MEMCTRL, 0x69, reg8); -#endif dl = 2; for (i = 0; i < 4; i++) { reg8 = pci_read_config8(PCI_DEV(0, 0, 4), (SCRATCH_RANK_0 + i)); |