diff options
author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2018-05-24 02:02:42 +0300 |
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committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2018-05-31 03:44:42 +0000 |
commit | e99f0390b9b8e04b197b165e6e63826ce9631d35 (patch) | |
tree | 87644b5d2db42a7ec85f480cc1e75fdde7523e87 /src/northbridge/via/cx700/early_serial.c | |
parent | ec953bc2f95111f6a925d380f9db0ea95392fd89 (diff) |
Remove VIA CX700 northbridge support
Change-Id: Id46e3d40393598f6b03ae4fd3186182635f072ca
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/26678
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/northbridge/via/cx700/early_serial.c')
-rw-r--r-- | src/northbridge/via/cx700/early_serial.c | 98 |
1 files changed, 0 insertions, 98 deletions
diff --git a/src/northbridge/via/cx700/early_serial.c b/src/northbridge/via/cx700/early_serial.c deleted file mode 100644 index 8f1800fcab..0000000000 --- a/src/northbridge/via/cx700/early_serial.c +++ /dev/null @@ -1,98 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007-2009 coresystems GmbH - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -/* - * Enable the serial devices on the VIA CX700 - */ - -#include <arch/io.h> - -static void cx700_writepnpaddr(u8 val) -{ - outb(val, 0x2e); - outb(val, 0xeb); -} - -static void cx700_writepnpdata(u8 val) -{ - outb(val, 0x2f); - outb(val, 0xeb); -} - -static void cx700_writesiobyte(u16 reg, u8 val) -{ - outb(val, reg); -} - -static void cx700_writesioword(u16 reg, u16 val) -{ - outw(val, reg); -} - -static void enable_cx700_serial(void) -{ - post_code(0x06); - - // WTH? - outb(0x03, 0x22); - - // Set UART1 I/O Base Address - pci_write_config8(PCI_DEV(0, 17, 0), 0xb4, 0x7e); - - // UART1 Enable - pci_write_config8(PCI_DEV(0, 17, 0), 0xb0, 0x10); - - // turn on pnp - cx700_writepnpaddr(0x87); - cx700_writepnpaddr(0x87); - // now go ahead and set up com1. - // set address - cx700_writepnpaddr(0x7); - cx700_writepnpdata(0x2); - // enable serial out - cx700_writepnpaddr(0x30); - cx700_writepnpdata(0x1); - // serial port 1 base address (FEh) - cx700_writepnpaddr(0x60); - cx700_writepnpdata(0xfe); - // serial port 1 IRQ (04h) - cx700_writepnpaddr(0x70); - cx700_writepnpdata(0x4); - // serial port 1 control - cx700_writepnpaddr(0xf0); - cx700_writepnpdata(0x2); - // turn of pnp - cx700_writepnpaddr(0xaa); - - // XXX This part should be fully taken care of by - // src/lib/uart8250.c:uart_init - - // set up reg to set baud rate. - cx700_writesiobyte(0x3fb, 0x80); - // Set 115 kb - cx700_writesioword(0x3f8, 1); - // Set 9.6 kb - // cx700_writesioword(0x3f8, 12) - // now set no parity, one stop, 8 bits - cx700_writesiobyte(0x3fb, 3); - // now turn on RTS, DRT - cx700_writesiobyte(0x3fc, 3); - // Enable interrupts - cx700_writesiobyte(0x3f9, 0xf); - // should be done. Dump a char for fun. - cx700_writesiobyte(0x3f8, 48); - - post_code(0x07); -} |