diff options
author | Uwe Hermann <uwe@hermann-uwe.de> | 2008-10-09 17:08:32 +0000 |
---|---|---|
committer | Uwe Hermann <uwe@hermann-uwe.de> | 2008-10-09 17:08:32 +0000 |
commit | ea7b518ec087ff7847ba2ff8b717305db4c14ab9 (patch) | |
tree | 0978be87478c0fe1bf2293fc98cabe35bb04b080 /src/northbridge/via/cn700/northbridge.c | |
parent | c1d06b782ff140acae61253a3e663c0ac517ab04 (diff) |
Indent-based + manual cleanups for CN700 (trivial). As this will be ported
to v3 sooner or later we cleanup _now_, so we don't have to do it twice.
- Whitespace, coding style improvements.
- Fix a few typos.
- Add a missing #endif in raminit.h.
- Drop an unused variable.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3644 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge/via/cn700/northbridge.c')
-rw-r--r-- | src/northbridge/via/cn700/northbridge.c | 159 |
1 files changed, 80 insertions, 79 deletions
diff --git a/src/northbridge/via/cn700/northbridge.c b/src/northbridge/via/cn700/northbridge.c index 3f4fe373d7..af914528d9 100644 --- a/src/northbridge/via/cn700/northbridge.c +++ b/src/northbridge/via/cn700/northbridge.c @@ -38,17 +38,15 @@ static void memctrl_init(device_t dev) { device_t vlink_dev; u16 reg16; - u8 ranks; - u8 pagec, paged, pagee, pagef; - u8 shadowreg; - - /* Set up the vga framebuffer size */ + u8 ranks, pagec, paged, pagee, pagef, shadowreg; + + /* Set up the VGA framebuffer size. */ reg16 = (log2(CONFIG_VIDEO_MB) << 12) | (1 << 15); pci_write_config16(dev, 0xa0, reg16); - - /* Set up VGA timers */ + + /* Set up VGA timers. */ pci_write_config8(dev, 0xa2, 0x44); - + for (ranks = 0x4b; ranks >= 0x48; ranks--) { if (pci_read_config8(dev, ranks)) { ranks -= 0x48; @@ -64,7 +62,7 @@ static void memctrl_init(device_t dev) /* AGPCINT Misc. */ pci_write_config8(dev, 0xb8, 0x08); - /* shadown ram */ + /* Shadow RAM */ pagec = 0xff, paged = 0xff, pagee = 0xff, pagef = 0x30; /* PAGE C, D, E are all read write enable */ pci_write_config8(dev, 0x80, pagec); @@ -75,11 +73,13 @@ static void memctrl_init(device_t dev) shadowreg |= pagef; pci_write_config8(dev, 0x83, shadowreg); /* vlink mirror */ - vlink_dev = dev_find_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_CN700_VLINK, 0); + vlink_dev = dev_find_device(PCI_VENDOR_ID_VIA, + PCI_DEVICE_ID_VIA_CN700_VLINK, 0); if (vlink_dev) { pci_write_config8(vlink_dev, 0x61, pagec); pci_write_config8(vlink_dev, 0x62, paged); pci_write_config8(vlink_dev, 0x64, pagee); + shadowreg = pci_read_config8(vlink_dev, 0x63); shadowreg |= pagef; pci_write_config8(vlink_dev, 0x63, shadowreg); @@ -88,91 +88,93 @@ static void memctrl_init(device_t dev) static const struct device_operations memctrl_operations = { .read_resources = cn700_noop, - .init = memctrl_init, + .init = memctrl_init, }; static const struct pci_driver memctrl_driver __pci_driver = { - .ops = &memctrl_operations, + .ops = &memctrl_operations, .vendor = PCI_VENDOR_ID_VIA, .device = PCI_DEVICE_ID_VIA_CN700_MEMCTRL, }; static void pci_domain_read_resources(device_t dev) { - struct resource *resource; + struct resource *resource; printk_spew("Entering cn700 pci_domain_read_resources.\n"); - /* Initialize the system wide io space constraints */ - resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0,0)); - resource->limit = 0xffffUL; - resource->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | - IORESOURCE_ASSIGNED; + /* Initialize the system wide I/O space constraints. */ + resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0)); + resource->limit = 0xffffUL; + resource->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | + IORESOURCE_ASSIGNED; - /* Initialize the system wide memory resources constraints */ - resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1,0)); - resource->limit = 0xffffffffULL; - resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | - IORESOURCE_ASSIGNED; + /* Initialize the system wide memory resources constraints. */ + resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0)); + resource->limit = 0xffffffffULL; + resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | + IORESOURCE_ASSIGNED; printk_spew("Leaving cn700 pci_domain_read_resources.\n"); } static void ram_resource(device_t dev, unsigned long index, - unsigned long basek, unsigned long sizek) + unsigned long basek, unsigned long sizek) { - struct resource *resource; - - if (!sizek) { - return; - } - resource = new_resource(dev, index); - resource->base = ((resource_t)basek) << 10; - resource->size = ((resource_t)sizek) << 10; - resource->flags = IORESOURCE_MEM | IORESOURCE_CACHEABLE | \ - IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED; + struct resource *resource; + + if (!sizek) + return; + + resource = new_resource(dev, index); + resource->base = ((resource_t) basek) << 10; + resource->size = ((resource_t) sizek) << 10; + resource->flags = IORESOURCE_MEM | IORESOURCE_CACHEABLE | + IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED; } static void tolm_test(void *gp, struct device *dev, struct resource *new) { struct resource **best_p = gp; struct resource *best; + best = *best_p; - if (!best || (best->base > new->base)) { + if (!best || (best->base > new->base)) best = new; - } *best_p = best; } static u32 find_pci_tolm(struct bus *bus) { - print_debug("Entering find_pci_tolm\n"); struct resource *min; u32 tolm; + + print_debug("Entering find_pci_tolm\n"); + min = 0; - search_bus_resources(bus, IORESOURCE_MEM, IORESOURCE_MEM, tolm_test, &min); + search_bus_resources(bus, IORESOURCE_MEM, IORESOURCE_MEM, + tolm_test, &min); tolm = 0xffffffffUL; - if (min && tolm > min->base) { + if (min && tolm > min->base) tolm = min->base; - } + print_debug("Leaving find_pci_tolm\n"); + return tolm; } static void pci_domain_set_resources(device_t dev) { - /* - * the order is important to find the correct ram size. - */ - static const u8 ramregs[] = {0x43, 0x42, 0x41, 0x40}; + /* The order is important to find the correct RAM size. */ + static const u8 ramregs[] = { 0x43, 0x42, 0x41, 0x40 }; device_t mc_dev; - u32 pci_tolm; + u32 pci_tolm; printk_spew("Entering cn700 pci_domain_set_resources.\n"); - pci_tolm = find_pci_tolm(&dev->link[0]); - mc_dev = dev_find_device(PCI_VENDOR_ID_VIA, - PCI_DEVICE_ID_VIA_CN700_MEMCTRL, 0); + pci_tolm = find_pci_tolm(&dev->link[0]); + mc_dev = dev_find_device(PCI_VENDOR_ID_VIA, + PCI_DEVICE_ID_VIA_CN700_MEMCTRL, 0); if (mc_dev) { unsigned long tomk, tolmk; @@ -180,30 +182,30 @@ static void pci_domain_set_resources(device_t dev) int i, idx; /* - * once the register value is not zero, the ramsize is - * this register's value multiply 64 * 1024 * 1024 + * Once the register value is not zero, the RAM size is + * this register's value multiply 64 * 1024 * 1024. */ - for(rambits = 0, i = 0; i < ARRAY_SIZE(ramregs); i++) { - unsigned char reg; + for (rambits = 0, i = 0; i < ARRAY_SIZE(ramregs); i++) { rambits = pci_read_config8(mc_dev, ramregs[i]); if (rambits != 0) break; } - + tomk = rambits * 64 * 1024; printk_spew("tomk is 0x%x\n", tomk); - /* Compute the Top Of Low Memory, in Kb */ + /* Compute the Top Of Low Memory (TOLM), in Kb. */ tolmk = pci_tolm >> 10; if (tolmk >= tomk) { /* The PCI hole does does not overlap the memory. */ tolmk = tomk; } - /* Report the memory regions */ + /* Report the memory regions. */ idx = 10; /* TODO: Hole needed? */ - ram_resource(dev, idx++, 0, 640); /* first 640k */ - /* Leave a hole for vga, 0xa0000 - 0xc0000 */ - ram_resource(dev, idx++, 768, (tolmk - 768 - CONFIG_VIDEO_MB * 1024)); + ram_resource(dev, idx++, 0, 640); /* First 640k */ + /* Leave a hole for VGA, 0xa0000 - 0xc0000 */ + ram_resource(dev, idx++, 768, + (tolmk - 768 - CONFIG_VIDEO_MB * 1024)); } assign_resources(&dev->link[0]); } @@ -212,21 +214,21 @@ static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max) { printk_debug("Entering cn700 pci_domain_scan_bus.\n"); - max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max); - return max; + max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max); + return max; } static const struct device_operations pci_domain_ops = { - .read_resources = pci_domain_read_resources, - .set_resources = pci_domain_set_resources, - .enable_resources = enable_childrens_resources, - .init = 0, - .scan_bus = pci_domain_scan_bus, -}; + .read_resources = pci_domain_read_resources, + .set_resources = pci_domain_set_resources, + .enable_resources = enable_childrens_resources, + .init = 0, + .scan_bus = pci_domain_scan_bus, +}; static void cpu_bus_init(device_t dev) { - initialize_cpus(&dev->link[0]); + initialize_cpus(&dev->link[0]); } static void cpu_bus_noop(device_t dev) @@ -234,25 +236,24 @@ static void cpu_bus_noop(device_t dev) } static const struct device_operations cpu_bus_ops = { - .read_resources = cpu_bus_noop, - .set_resources = cpu_bus_noop, - .enable_resources = cpu_bus_noop, - .init = cpu_bus_init, - .scan_bus = 0, + .read_resources = cpu_bus_noop, + .set_resources = cpu_bus_noop, + .enable_resources = cpu_bus_noop, + .init = cpu_bus_init, + .scan_bus = 0, }; static void enable_dev(struct device *dev) { printk_spew("In cn700 enable_dev for device %s.\n", dev_path(dev)); - /* Set the operations if it is a special bus type */ - if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) { - dev->ops = &pci_domain_ops; + /* Set the operations if it is a special bus type. */ + if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) { + dev->ops = &pci_domain_ops; pci_set_method(dev); - } - else if (dev->path.type == DEVICE_PATH_APIC_CLUSTER) { - dev->ops = &cpu_bus_ops; - } + } else if (dev->path.type == DEVICE_PATH_APIC_CLUSTER) { + dev->ops = &cpu_bus_ops; + } } struct chip_operations northbridge_via_cn700_ops = { |