diff options
| author | Stefan Reinauer <stepan@coresystems.de> | 2009-04-30 13:58:42 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2009-04-30 13:58:42 +0000 |
| commit | b5fb0c5c4eda2329d848aedcf4f7e8b6dc8012b2 (patch) | |
| tree | 9a0897635ecbeab0dd64124cd165d3460174a359 /src/northbridge/via/cn700/northbridge.c | |
| parent | 6841ce653741b3dafe8e3482b4a93adbaee53552 (diff) | |
Add high tables support to all northbridges.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4238 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge/via/cn700/northbridge.c')
| -rw-r--r-- | src/northbridge/via/cn700/northbridge.c | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/src/northbridge/via/cn700/northbridge.c b/src/northbridge/via/cn700/northbridge.c index af914528d9..2d3adf1288 100644 --- a/src/northbridge/via/cn700/northbridge.c +++ b/src/northbridge/via/cn700/northbridge.c @@ -163,6 +163,12 @@ static u32 find_pci_tolm(struct bus *bus) return tolm; } +#if HAVE_HIGH_TABLES==1 +/* maximum size of high tables in KB */ +#define HIGH_TABLES_SIZE 64 +extern uint64_t high_tables_base, high_tables_size; +#endif + static void pci_domain_set_resources(device_t dev) { /* The order is important to find the correct RAM size. */ @@ -199,6 +205,13 @@ static void pci_domain_set_resources(device_t dev) /* The PCI hole does does not overlap the memory. */ tolmk = tomk; } + +#if HAVE_HIGH_TABLES == 1 + high_tables_base = (tolmk - HIGH_TABLES_SIZE) * 1024; + high_tables_size = HIGH_TABLES_SIZE* 1024; + printk_debug("tom: %lx, high_tables_base: %llx, high_tables_size: %llx\n", tomk*1024, high_tables_base, high_tables_size); +#endif + /* Report the memory regions. */ idx = 10; /* TODO: Hole needed? */ |