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authorNico Huber <nico.huber@secunet.com>2015-10-01 19:00:51 +0200
committerNico Huber <nico.h@gmx.de>2015-10-16 22:47:22 +0000
commit7b2f9f6994341a890a11220a9d9fcbf7997bcae9 (patch)
tree62c6fd59dc3bda48969cb6499cfeb3348d71aadb /src/northbridge/rdc
parentf3214d02482a4104d7276f06d6b326b2a54c4262 (diff)
intel/southbridge/bd82x6x: Add option to set SPI VSCC registers
These are needed for the hardware-sequencing function of the PCH SPI interface. Values are specific to the flash chip used on a board. Change-Id: Id06766b4bac2686406bc09b8afa02f311f40dee7 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: http://review.coreboot.org/11798 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Nicolas Reinecke <nr@das-labor.org> Reviewed-by: Duncan Laurie <dlaurie@google.com>
Diffstat (limited to 'src/northbridge/rdc')
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