diff options
| author | Angel Pons <th3fanbus@gmail.com> | 2021-03-17 11:24:59 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-03-25 07:51:50 +0000 |
| commit | f5ec52a5226d9171b665ed2203c228748882f464 (patch) | |
| tree | c13ac96afb425ed4f17f798075dd0599694ea91b /src/northbridge/intel | |
| parent | d0f971fe9a5d3c081d932a767b7373acc5f00b4a (diff) | |
nb/intel/haswell: Move USB config API into Lynx Point
Both EHCI and xHCI USB controllers are inside the PCH (southbridge).
Now that mainboard USB configuration no longer depends on pei_data.h
definitions, the API declarations can be placed in southbridge code.
Tested with BUILD_TIMELESS=1, Asrock B85M Pro4 remains identical.
Change-Id: Ia21991b225482b33c5bc0dc52884674d301b28ba
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51569
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/northbridge/intel')
| -rw-r--r-- | src/northbridge/intel/haswell/raminit.h | 42 |
1 files changed, 0 insertions, 42 deletions
diff --git a/src/northbridge/intel/haswell/raminit.h b/src/northbridge/intel/haswell/raminit.h index c0f6c639d3..5483229f3b 100644 --- a/src/northbridge/intel/haswell/raminit.h +++ b/src/northbridge/intel/haswell/raminit.h @@ -12,48 +12,6 @@ struct spd_info { unsigned int spd_index; }; -#if CONFIG(INTEL_LYNXPOINT_LP) -#define MAX_USB2_PORTS 10 -#define MAX_USB3_PORTS 4 -#else -#define MAX_USB2_PORTS 14 -#define MAX_USB3_PORTS 6 -#endif - -/* There are 8 OC pins */ -#define USB_OC_PIN_SKIP 8 - -enum usb2_port_location { - USB_PORT_SKIP = 0, - USB_PORT_BACK_PANEL, - USB_PORT_FRONT_PANEL, - USB_PORT_DOCK, - USB_PORT_MINI_PCIE, - USB_PORT_FLEX, - USB_PORT_INTERNAL, -}; - -/* - * USB port length is in MRC format: binary-coded decimal length in tenths of an inch. - * 4.2 inches -> 0x0042 - * 12.7 inches -> 0x0127 - */ -struct usb2_port_config { - uint16_t length; - bool enable; - unsigned short oc_pin; - enum usb2_port_location location; -}; - -struct usb3_port_config { - bool enable; - unsigned int oc_pin; -}; - -/* Mainboard-specific USB configuration */ -extern const struct usb2_port_config mainboard_usb2_ports[MAX_USB2_PORTS]; -extern const struct usb3_port_config mainboard_usb3_ports[MAX_USB3_PORTS]; - /* Mainboard callback to fill in the SPD addresses */ void mb_get_spd_map(struct spd_info *spdi); |