diff options
| author | Shuo Liu <shuo.liu@intel.com> | 2024-06-25 18:50:06 +0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2024-06-26 18:07:30 +0000 |
| commit | f3aaa0e1539c16a3a26a769110ec1aca458ab410 (patch) | |
| tree | 30a9a682a32c882eee4252fb44868c1b7a3565a5 /src/northbridge/intel | |
| parent | 79d7f3a13ed59515bee0d043c3fda79854201858 (diff) | |
acpi: Rename acpi_create_dmar_drhd
For most of SoCs, DRHD is by default with the size of 4KB. However,
larger sizes are allowed as well. Rename acpi_create_dmar_drhd to
acpi_create_dmar_drhd_4k to support the default case while a later
patch will re-add acpi_create_dmar_drhd with a size parameter.
TEST=intel/archercity CRB
Change-Id: Ic0a0618aa8e46d3fec2ceac7a91742122993df91
Signed-off-by: Shuo Liu <shuo.liu@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83202
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/northbridge/intel')
| -rw-r--r-- | src/northbridge/intel/gm45/acpi.c | 8 | ||||
| -rw-r--r-- | src/northbridge/intel/haswell/acpi.c | 4 | ||||
| -rw-r--r-- | src/northbridge/intel/sandybridge/acpi.c | 4 |
3 files changed, 8 insertions, 8 deletions
diff --git a/src/northbridge/intel/gm45/acpi.c b/src/northbridge/intel/gm45/acpi.c index 246fe9aaca..70f0736a8a 100644 --- a/src/northbridge/intel/gm45/acpi.c +++ b/src/northbridge/intel/gm45/acpi.c @@ -25,13 +25,13 @@ static unsigned long acpi_fill_dmar(unsigned long current) PCI_CLASS_REVISION); unsigned long tmp = current; - current += acpi_create_dmar_drhd(current, 0, 0, IOMMU_BASE1); + current += acpi_create_dmar_drhd_4k(current, 0, 0, IOMMU_BASE1); current += acpi_create_dmar_ds_pci(current, 0, 0x1b, 0); acpi_dmar_drhd_fixup(tmp, current); if (stepping != STEPPING_B2 && igd_active) { tmp = current; - current += acpi_create_dmar_drhd(current, 0, 0, IOMMU_BASE2); + current += acpi_create_dmar_drhd_4k(current, 0, 0, IOMMU_BASE2); current += acpi_create_dmar_ds_pci(current, 0, 0x2, 0); current += acpi_create_dmar_ds_pci(current, 0, 0x2, 1); acpi_dmar_drhd_fixup(tmp, current); @@ -39,7 +39,7 @@ static unsigned long acpi_fill_dmar(unsigned long current) if (me_active) { tmp = current; - current += acpi_create_dmar_drhd(current, 0, 0, IOMMU_BASE3); + current += acpi_create_dmar_drhd_4k(current, 0, 0, IOMMU_BASE3); current += acpi_create_dmar_ds_pci(current, 0, 0x3, 0); current += acpi_create_dmar_ds_pci(current, 0, 0x3, 1); current += acpi_create_dmar_ds_pci(current, 0, 0x3, 2); @@ -47,7 +47,7 @@ static unsigned long acpi_fill_dmar(unsigned long current) acpi_dmar_drhd_fixup(tmp, current); } - current += acpi_create_dmar_drhd(current, DRHD_INCLUDE_PCI_ALL, 0, IOMMU_BASE4); + current += acpi_create_dmar_drhd_4k(current, DRHD_INCLUDE_PCI_ALL, 0, IOMMU_BASE4); /* TODO: reserve GTT for 0.2.0 and 0.2.1? */ return current; diff --git a/src/northbridge/intel/haswell/acpi.c b/src/northbridge/intel/haswell/acpi.c index f3c107b323..bd2f719654 100644 --- a/src/northbridge/intel/haswell/acpi.c +++ b/src/northbridge/intel/haswell/acpi.c @@ -28,7 +28,7 @@ static unsigned long acpi_fill_dmar(unsigned long current) if (emit_igd) { const unsigned long tmp = current; - current += acpi_create_dmar_drhd(current, 0, 0, gfxvtbar); + current += acpi_create_dmar_drhd_4k(current, 0, 0, gfxvtbar); current += acpi_create_dmar_ds_pci(current, 0, 2, 0); acpi_dmar_drhd_fixup(tmp, current); @@ -37,7 +37,7 @@ static unsigned long acpi_fill_dmar(unsigned long current) /* VTVC0BAR has to be set, enabled, and in 32-bit space */ if (vtvc0bar && vtvc0en && !mchbar_read32(VTVC0BAR + 4)) { const unsigned long tmp = current; - current += acpi_create_dmar_drhd(current, DRHD_INCLUDE_PCI_ALL, 0, vtvc0bar); + current += acpi_create_dmar_drhd_4k(current, DRHD_INCLUDE_PCI_ALL, 0, vtvc0bar); current += acpi_create_dmar_ds_ioapic_from_hw(current, IO_APIC_ADDR, PCH_IOAPIC_PCI_BUS, PCH_IOAPIC_PCI_SLOT, 0); diff --git a/src/northbridge/intel/sandybridge/acpi.c b/src/northbridge/intel/sandybridge/acpi.c index 8be161ec05..3ffab4d44c 100644 --- a/src/northbridge/intel/sandybridge/acpi.c +++ b/src/northbridge/intel/sandybridge/acpi.c @@ -34,14 +34,14 @@ static unsigned long acpi_fill_dmar(unsigned long current) if (igfx && igfx->enabled) { const unsigned long tmp = current; - current += acpi_create_dmar_drhd(current, 0, 0, GFXVT_BASE); + current += acpi_create_dmar_drhd_4k(current, 0, 0, GFXVT_BASE); current += acpi_create_dmar_ds_pci(current, 0, 2, 0); acpi_dmar_drhd_fixup(tmp, current); } { const unsigned long tmp = current; - current += acpi_create_dmar_drhd(current, DRHD_INCLUDE_PCI_ALL, 0, VTVC0_BASE); + current += acpi_create_dmar_drhd_4k(current, DRHD_INCLUDE_PCI_ALL, 0, VTVC0_BASE); current += acpi_create_dmar_ds_ioapic_from_hw(current, IO_APIC_ADDR, PCH_IOAPIC_PCI_BUS, |