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authorElyes HAOUAS <ehaouas@noos.fr>2019-05-20 18:52:58 +0200
committerPatrick Georgi <pgeorgi@google.com>2019-05-23 08:57:27 +0000
commitf00d37342c7fcabd9760ac69976227752e5c96f1 (patch)
treec7c4691901284574e156a92134ad5bccf25edda5 /src/northbridge/intel
parent0c89c1c05e514c8c6ddc5a844f84a2b422f1bd56 (diff)
nb/intel/pineview/early_init.c: Remove variable set but not used
Change-Id: If9ca551794a52e47a3649b126c3f061a68c494e4 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32897 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/northbridge/intel')
-rw-r--r--src/northbridge/intel/pineview/early_init.c8
1 files changed, 3 insertions, 5 deletions
diff --git a/src/northbridge/intel/pineview/early_init.c b/src/northbridge/intel/pineview/early_init.c
index a0d5305255..509ab4ee0c 100644
--- a/src/northbridge/intel/pineview/early_init.c
+++ b/src/northbridge/intel/pineview/early_init.c
@@ -119,9 +119,7 @@ static void early_graphics_setup(void)
static void early_misc_setup(void)
{
- u32 reg32;
-
- reg32 = MCHBAR32(0x30);
+ MCHBAR32(0x30);
MCHBAR32(0x30) = 0x21800;
DMIBAR32(0x2c) = 0x86000040;
pci_write_config32(PCI_DEV(0, 0x1e, 0), 0x18, 0x00020200);
@@ -129,9 +127,9 @@ static void early_misc_setup(void)
early_graphics_setup();
- reg32 = MCHBAR32(0x40);
+ MCHBAR32(0x40);
MCHBAR32(0x40) = 0x0;
- reg32 = MCHBAR32(0x40);
+ MCHBAR32(0x40);
MCHBAR32(0x40) = 0x8;
pci_write_config8(LPC, 0x8, 0x1d);