diff options
| author | Julius Werner <jwerner@chromium.org> | 2024-01-30 16:51:05 -0800 |
|---|---|---|
| committer | Julius Werner <jwerner@chromium.org> | 2024-02-02 22:48:27 +0000 |
| commit | de37109767b6b415778f34cbac196c8418f7e371 (patch) | |
| tree | 44ede1025fd6058c09cc99c8e7d7122a64203641 /src/northbridge/intel | |
| parent | 416cc665929e4e66bcab3e395daa031401a61fe8 (diff) | |
lib: Move IP checksum to commonlib
This patch moves the IP checksum algorithm into commonlib to prepare for
it being shared with libpayload. The current implementation is ancient
and pretty hard to read (and does some unnecessary questionable things
like the type-punning stuff which leads to suboptimal code generation),
so this reimplements it from scratch (that also helps with the
licensing).
This algorithm is prepared to take in a pre-calculated "wide" checksum
in a machine-register-sized data type which is then narrowed down to 16
bits (see RFC 1071 for why that's valid). This isn't used yet (and the
code will get optimized out), but will be used later in this patch
series for architecture-specific optimization.
Change-Id: Ic04c714c00439a17fc04a8a6e730cc2aa19b8e68
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80251
Reviewed-by: Yidi Lin <yidilin@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jakub Czapiga <czapiga@google.com>
Diffstat (limited to 'src/northbridge/intel')
| -rw-r--r-- | src/northbridge/intel/haswell/broadwell_mrc/raminit.c | 1 | ||||
| -rw-r--r-- | src/northbridge/intel/haswell/haswell_mrc/raminit.c | 1 | ||||
| -rw-r--r-- | src/northbridge/intel/ironlake/raminit.c | 1 | ||||
| -rw-r--r-- | src/northbridge/intel/sandybridge/raminit_mrc.c | 14 |
4 files changed, 7 insertions, 10 deletions
diff --git a/src/northbridge/intel/haswell/broadwell_mrc/raminit.c b/src/northbridge/intel/haswell/broadwell_mrc/raminit.c index c00e59a90f..b8a9416ff6 100644 --- a/src/northbridge/intel/haswell/broadwell_mrc/raminit.c +++ b/src/northbridge/intel/haswell/broadwell_mrc/raminit.c @@ -8,7 +8,6 @@ #include <cbmem.h> #include <cbfs.h> #include <cf9_reset.h> -#include <ip_checksum.h> #include <memory_info.h> #include <mrc_cache.h> #include <device/device.h> diff --git a/src/northbridge/intel/haswell/haswell_mrc/raminit.c b/src/northbridge/intel/haswell/haswell_mrc/raminit.c index bf072fa955..f23e40d8f7 100644 --- a/src/northbridge/intel/haswell/haswell_mrc/raminit.c +++ b/src/northbridge/intel/haswell/haswell_mrc/raminit.c @@ -7,7 +7,6 @@ #include <cbmem.h> #include <cbfs.h> #include <cf9_reset.h> -#include <ip_checksum.h> #include <memory_info.h> #include <mrc_cache.h> #include <device/device.h> diff --git a/src/northbridge/intel/ironlake/raminit.c b/src/northbridge/intel/ironlake/raminit.c index 8a934edce3..b84461aef8 100644 --- a/src/northbridge/intel/ironlake/raminit.c +++ b/src/northbridge/intel/ironlake/raminit.c @@ -11,7 +11,6 @@ #include <cpu/x86/cache.h> #include <cbmem.h> #include <cf9_reset.h> -#include <ip_checksum.h> #include <option.h> #include <device/pci_def.h> #include <device/device.h> diff --git a/src/northbridge/intel/sandybridge/raminit_mrc.c b/src/northbridge/intel/sandybridge/raminit_mrc.c index dde5742e8b..82e3e82842 100644 --- a/src/northbridge/intel/sandybridge/raminit_mrc.c +++ b/src/northbridge/intel/sandybridge/raminit_mrc.c @@ -11,7 +11,7 @@ #include <arch/cpu.h> #include <cbmem.h> #include <cbfs.h> -#include <ip_checksum.h> +#include <commonlib/bsd/ipchksum.h> #include <pc80/mc146818rtc.h> #include <device/pci_def.h> #include <lib.h> @@ -73,9 +73,9 @@ static void save_mrc_data(struct pei_data *pei_data) pei_data->scrambler_seed_s3, CMOS_OFFSET_MRC_SEED_S3); /* Save a simple checksum of the seed values */ - c1 = compute_ip_checksum((u8 *)&pei_data->scrambler_seed, sizeof(u32)); - c2 = compute_ip_checksum((u8 *)&pei_data->scrambler_seed_s3, sizeof(u32)); - checksum = add_ip_checksums(sizeof(u32), c1, c2); + c1 = ipchksum((u8 *)&pei_data->scrambler_seed, sizeof(u32)); + c2 = ipchksum((u8 *)&pei_data->scrambler_seed_s3, sizeof(u32)); + checksum = ipchksum_add(sizeof(u32), c1, c2); cmos_write((checksum >> 0) & 0xff, CMOS_OFFSET_MRC_SEED_CHK); cmos_write((checksum >> 8) & 0xff, CMOS_OFFSET_MRC_SEED_CHK + 1); @@ -100,9 +100,9 @@ static void prepare_mrc_cache(struct pei_data *pei_data) pei_data->scrambler_seed_s3, CMOS_OFFSET_MRC_SEED_S3); /* Compute seed checksum and compare */ - c1 = compute_ip_checksum((u8 *)&pei_data->scrambler_seed, sizeof(u32)); - c2 = compute_ip_checksum((u8 *)&pei_data->scrambler_seed_s3, sizeof(u32)); - checksum = add_ip_checksums(sizeof(u32), c1, c2); + c1 = ipchksum((u8 *)&pei_data->scrambler_seed, sizeof(u32)); + c2 = ipchksum((u8 *)&pei_data->scrambler_seed_s3, sizeof(u32)); + checksum = ipchksum_add(sizeof(u32), c1, c2); seed_checksum = cmos_read(CMOS_OFFSET_MRC_SEED_CHK); seed_checksum |= cmos_read(CMOS_OFFSET_MRC_SEED_CHK + 1) << 8; |