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authorKeith Hui <buurin@gmail.com>2023-03-23 01:11:44 -0400
committerLean Sheng Tan <sheng.tan@9elements.com>2023-05-17 13:09:04 +0000
commita491f2fa459dca41cea8e007852b4df6da1e7fb5 (patch)
tree909ae933155c4b1c929a393741efd73dfe0ebcfa /src/northbridge/intel
parentf97598f22fc228e3dc7e3887e9697bc50c579c97 (diff)
nb/intel/i440bx, mb/asus/p3b-f: Abolish disable_spd()
This hook is specifically for asus/p3b-f so its mainboard code has a chance to put SPD away after RAM init completes. What it intends to do is done when GPO gets programmed in ramstage (and it's safe to do so), and no other board needs this hook, so drop it. Change-Id: Ib7874b4d2b69fdaa5f3c5a3421a62a629c4154a4 Signed-off-by: Keith Hui <buurin@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/73951 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/northbridge/intel')
-rw-r--r--src/northbridge/intel/i440bx/raminit.c2
-rw-r--r--src/northbridge/intel/i440bx/raminit.h1
2 files changed, 0 insertions, 3 deletions
diff --git a/src/northbridge/intel/i440bx/raminit.c b/src/northbridge/intel/i440bx/raminit.c
index 80ccaed12b..81c4e785a3 100644
--- a/src/northbridge/intel/i440bx/raminit.c
+++ b/src/northbridge/intel/i440bx/raminit.c
@@ -1001,7 +1001,6 @@ static void sdram_enable(void)
/* Implemented under mainboard. */
void __weak enable_spd(void) { }
-void __weak disable_spd(void) { }
void sdram_initialize(int s3resume)
{
@@ -1013,6 +1012,5 @@ void sdram_initialize(int s3resume)
sdram_set_spd_registers();
sdram_enable();
- disable_spd();
timestamp_add_now(TS_INITRAM_END);
}
diff --git a/src/northbridge/intel/i440bx/raminit.h b/src/northbridge/intel/i440bx/raminit.h
index d2d1729e61..b35554f2e4 100644
--- a/src/northbridge/intel/i440bx/raminit.h
+++ b/src/northbridge/intel/i440bx/raminit.h
@@ -13,7 +13,6 @@
#define DIMM3 0x53
void enable_spd(void);
-void disable_spd(void);
void sdram_initialize(int s3resume);
/* Debug */