arch/x86/acpi: Add DMAR RMRR helper functions

Add DMAR RMRR table entry and helper functions, using the existing
DRHD functions as a model. As the DRHD device scope (DS) functions
aren't DRHD-specific, genericize them to be used with RMRR tables as
well. Correct DRHD bar size to match table entry in creator function,
as noted in comments from patchset below.

Adapted from/supersedes https://review.coreboot.org/25445

Change-Id: I912b1d7244ca4dd911bb6629533d453b1b4a06be
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/27269
Reviewed-by: Youness Alaoui <snifikino@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Jay Talbott <JayTalbott@sysproconsulting.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

3 files changed, 14 insertions, 14 deletions

diff --git a/src/northbridge/intel/gm45/acpi.c b/src/northbridge/intel/gm45/acpi.c
index 73b098f610..d208eed4ab 100644
--- a/src/northbridge/intel/gm45/acpi.c
+++ b/src/northbridge/intel/gm45/acpi.c
@@ -78,24 +78,24 @@ static unsigned long acpi_fill_dmar(unsigned long current)
 
 	unsigned long tmp = current;
 	current += acpi_create_dmar_drhd(current, 0, 0, IOMMU_BASE1);
-	current += acpi_create_dmar_drhd_ds_pci(current, 0, 0x1b, 0);
+	current += acpi_create_dmar_ds_pci(current, 0, 0x1b, 0);
 	acpi_dmar_drhd_fixup(tmp, current);
 
 	if (stepping != STEPPING_B2) {
 		tmp = current;
 		current += acpi_create_dmar_drhd(current, 0, 0, IOMMU_BASE2);
-		current += acpi_create_dmar_drhd_ds_pci(current, 0, 0x2, 0);
-		current += acpi_create_dmar_drhd_ds_pci(current, 0, 0x2, 1);
+		current += acpi_create_dmar_ds_pci(current, 0, 0x2, 0);
+		current += acpi_create_dmar_ds_pci(current, 0, 0x2, 1);
 		acpi_dmar_drhd_fixup(tmp, current);
 	}
 
 	if (me_active) {
 		tmp = current;
 		current += acpi_create_dmar_drhd(current, 0, 0, IOMMU_BASE3);
-		current += acpi_create_dmar_drhd_ds_pci(current, 0, 0x3, 0);
-		current += acpi_create_dmar_drhd_ds_pci(current, 0, 0x3, 1);
-		current += acpi_create_dmar_drhd_ds_pci(current, 0, 0x3, 2);
-		current += acpi_create_dmar_drhd_ds_pci(current, 0, 0x3, 3);
+		current += acpi_create_dmar_ds_pci(current, 0, 0x3, 0);
+		current += acpi_create_dmar_ds_pci(current, 0, 0x3, 1);
+		current += acpi_create_dmar_ds_pci(current, 0, 0x3, 2);
+		current += acpi_create_dmar_ds_pci(current, 0, 0x3, 3);
 		acpi_dmar_drhd_fixup(tmp, current);
 	}
 
diff --git a/src/northbridge/intel/haswell/acpi.c b/src/northbridge/intel/haswell/acpi.c
index 292219f272..b3ceed972d 100644
--- a/src/northbridge/intel/haswell/acpi.c
+++ b/src/northbridge/intel/haswell/acpi.c
@@ -85,7 +85,7 @@ static unsigned long acpi_fill_dmar(unsigned long current)
 		const unsigned long tmp = current;
 
 		current += acpi_create_dmar_drhd(current, 0, 0, gfxvtbar);
-		current += acpi_create_dmar_drhd_ds_pci(current, 0, 2, 0);
+		current += acpi_create_dmar_ds_pci(current, 0, 2, 0);
 
 		acpi_dmar_drhd_fixup(tmp, current);
 	}
@@ -95,11 +95,11 @@ static unsigned long acpi_fill_dmar(unsigned long current)
 		const unsigned long tmp = current;
 		current += acpi_create_dmar_drhd(current,
 				DRHD_INCLUDE_PCI_ALL, 0, vtvc0bar);
-		current += acpi_create_dmar_drhd_ds_ioapic(current,
+		current += acpi_create_dmar_ds_ioapic(current,
 				2, PCH_IOAPIC_PCI_BUS, PCH_IOAPIC_PCI_SLOT, 0);
 		size_t i;
 		for (i = 0; i < 8; ++i)
-			current += acpi_create_dmar_drhd_ds_msi_hpet(current,
+			current += acpi_create_dmar_ds_msi_hpet(current,
 					0, PCH_HPET_PCI_BUS,
 					PCH_HPET_PCI_SLOT, i);
 		acpi_dmar_drhd_fixup(tmp, current);
diff --git a/src/northbridge/intel/sandybridge/acpi.c b/src/northbridge/intel/sandybridge/acpi.c
index 91ecac5956..88ac2b1e38 100644
--- a/src/northbridge/intel/sandybridge/acpi.c
+++ b/src/northbridge/intel/sandybridge/acpi.c
@@ -74,19 +74,19 @@ static unsigned long acpi_fill_dmar(unsigned long current)
 	if (igfx && igfx->enabled) {
 		const unsigned long tmp = current;
 		current += acpi_create_dmar_drhd(current, 0, 0, IOMMU_BASE1);
-		current += acpi_create_dmar_drhd_ds_pci(current, 0, 2, 0);
-		current += acpi_create_dmar_drhd_ds_pci(current, 0, 2, 1);
+		current += acpi_create_dmar_ds_pci(current, 0, 2, 0);
+		current += acpi_create_dmar_ds_pci(current, 0, 2, 1);
 		acpi_dmar_drhd_fixup(tmp, current);
 	}
 
 	const unsigned long tmp = current;
 	current += acpi_create_dmar_drhd(current,
 			DRHD_INCLUDE_PCI_ALL, 0, IOMMU_BASE2);
-	current += acpi_create_dmar_drhd_ds_ioapic(current,
+	current += acpi_create_dmar_ds_ioapic(current,
 			2, PCH_IOAPIC_PCI_BUS, PCH_IOAPIC_PCI_SLOT, 0);
 	size_t i;
 	for (i = 0; i < 8; ++i)
-		current += acpi_create_dmar_drhd_ds_msi_hpet(current,
+		current += acpi_create_dmar_ds_msi_hpet(current,
 				0, PCH_HPET_PCI_BUS, PCH_HPET_PCI_SLOT, i);
 	acpi_dmar_drhd_fixup(tmp, current);