diff options
author | Angel Pons <th3fanbus@gmail.com> | 2022-05-06 23:17:39 +0200 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2022-12-16 17:12:43 +0000 |
commit | 70c618547632924a4eae15023f14ab22469a26e0 (patch) | |
tree | d0443440d8606b1690adda592814a83712c9ebb5 /src/northbridge/intel | |
parent | 322b1c3d90200db2428554a9e1accfa07289930d (diff) |
sb/intel/lynxpoint: Add native USB init
Implement native USB initialisation for Lynx Point. This is only needed
when MRC.bin is not used.
TO DO: Figure out how to deal with the FIXME's and TODO's lying around.
Change-Id: Ie0fbeeca7b1ca1557173772d733fd2fa27703373
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64179
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/northbridge/intel')
-rw-r--r-- | src/northbridge/intel/haswell/native_raminit/raminit_native.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.c b/src/northbridge/intel/haswell/native_raminit/raminit_native.c index 6a002548c1..ef61d4ee09 100644 --- a/src/northbridge/intel/haswell/native_raminit/raminit_native.c +++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.c @@ -5,6 +5,7 @@ #include <northbridge/intel/haswell/haswell.h> #include <northbridge/intel/haswell/raminit.h> #include <southbridge/intel/lynxpoint/me.h> +#include <southbridge/intel/lynxpoint/pch.h> #include <types.h> static bool early_init_native(int s3resume) @@ -15,6 +16,8 @@ static bool early_init_native(int s3resume) /** TODO: CPU replacement check must be skipped in warm boots and S3 resumes **/ const bool cpu_replaced = !s3resume && intel_early_me_cpu_replacement_check(); + early_usb_init(); + if (!CONFIG(INTEL_LYNXPOINT_LP)) dmi_early_init(); |