diff options
| author | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2016-05-06 13:48:39 -0700 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2016-05-08 21:36:32 +0200 |
| commit | 66fbeaec981707fa74e7296b0ef23d802dcfedea (patch) | |
| tree | f1bb11648241bca52f4045ba61aae8ded8ad149e /src/northbridge/intel | |
| parent | 2a6f251f4d8d41d13051ec2c897aea800c07275a (diff) | |
intel/pineview: Don't try to store 34 bits in 32
Mask out the bit that doesn't fit in 32bits, so gcc 6.1 is happy
Change-Id: I13e2b41742206b8d86b90314b80cc324c00ae637
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/14639
Reviewed-by: Damien Zammit <damien@zamaudio.com>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/northbridge/intel')
| -rw-r--r-- | src/northbridge/intel/pineview/raminit.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/northbridge/intel/pineview/raminit.c b/src/northbridge/intel/pineview/raminit.c index a94a2ebb97..e4957d2484 100644 --- a/src/northbridge/intel/pineview/raminit.c +++ b/src/northbridge/intel/pineview/raminit.c @@ -822,7 +822,7 @@ static void sdram_timings(struct sysinfo *s) MCHBAR8(0x26c) = (MCHBAR8(0x26c) & ~0xfa) | ((u8)(reg32 >> 24)); MCHBAR8(0x271) = MCHBAR8(0x271) & ~(1 << 7); MCHBAR8(0x274) = MCHBAR8(0x274) & ~0x6; - reg32 = (u32) ((6 << 30) | (4 << 25) | (1 << 20) | (8 << 15) | + reg32 = (u32) (((6 & 0x03) << 30) | (4 << 25) | (1 << 20) | (8 << 15) | (6 << 10) | (4 << 5) | 1); MCHBAR32(0x278) = reg32; |