diff options
author | Stefan Reinauer <reinauer@chromium.org> | 2011-10-31 12:56:45 -0700 |
---|---|---|
committer | Patrick Georgi <patrick@georgi-clan.de> | 2011-11-01 19:07:45 +0100 |
commit | 5ff7c13e858a31addf1558731a12cf6c753b576d (patch) | |
tree | 82ed6cf7b45f3a86c2c43ab87383355ed6012d6c /src/northbridge/intel | |
parent | 784544b934d67dc85ccfcf33e04ff148045836ad (diff) |
remove trailing whitespace
Change-Id: Ib91889a374515d36a2b12b53aeb12b6ea6e22732
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/364
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/northbridge/intel')
-rw-r--r-- | src/northbridge/intel/i82830/smihandler.c | 2 | ||||
-rw-r--r-- | src/northbridge/intel/i855/raminit.c | 8 |
2 files changed, 5 insertions, 5 deletions
diff --git a/src/northbridge/intel/i82830/smihandler.c b/src/northbridge/intel/i82830/smihandler.c index f7c6b5af25..37b138a6da 100644 --- a/src/northbridge/intel/i82830/smihandler.c +++ b/src/northbridge/intel/i82830/smihandler.c @@ -196,7 +196,7 @@ static void mbi_call(u8 subf, banner_id_t *banner_id) } mbi_header = (mbi_header_t *)&mbi[i]; - len = ALIGN((mbi_header->size * 16) + sizeof(mbi_header) + ALIGN(mbi_header->name_len, 16), 16); + len = ALIGN((mbi_header->size * 16) + sizeof(mbi_header) + ALIGN(mbi_header->name_len, 16), 16); if (obj_header->objnum == count) { #ifdef DEBUG_SMI_I82830 diff --git a/src/northbridge/intel/i855/raminit.c b/src/northbridge/intel/i855/raminit.c index 85ba1be4f0..23c3cb14d1 100644 --- a/src/northbridge/intel/i855/raminit.c +++ b/src/northbridge/intel/i855/raminit.c @@ -831,12 +831,12 @@ static void spd_set_dram_throttle_control(void) */ dtc_reg |= (3 << 28); - /* Read Counter Based Power Throttle Control (RCTC): + /* Read Counter Based Power Throttle Control (RCTC): * 0 = 85% */ dtc_reg |= (0 << 24); - /* Write Counter Based Power Throttle Control (WCTC): + /* Write Counter Based Power Throttle Control (WCTC): * 0 = 85% */ dtc_reg |= (0 << 20); @@ -879,7 +879,7 @@ static void spd_update(u8 reg, u32 new_value) u32 value2 = pci_read_config32(NORTHBRIDGE_MMC, reg); PRINTK_DEBUG("update reg %02x, old: %08x, new: %08x, read back: %08x\n", reg, value1, new_value, value2); #endif -} +} /* if ram still doesn't work do this function */ static void spd_set_undocumented_registers(void) @@ -967,7 +967,7 @@ static void sdram_set_spd_registers(void) if (dimm_mask == 0) { print_debug("No usable memory for this controller\n"); } else { - PRINTK_DEBUG("DIMM MASK: %02x\n", dimm_mask); + PRINTK_DEBUG("DIMM MASK: %02x\n", dimm_mask); spd_set_row_attributes(dimm_mask); spd_set_dram_controller_mode(dimm_mask); |