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authorUwe Hermann <uwe@hermann-uwe.de>2007-05-27 21:43:58 +0000
committerUwe Hermann <uwe@hermann-uwe.de>2007-05-27 21:43:58 +0000
commit4cb85533dd14731048b65d8f2e165a271b98953e (patch)
tree800469af7557955e815df69ab36efa8156f81b49 /src/northbridge/intel
parent4834a4f2063509cbdb2ab20114f18664d5e9caf2 (diff)
Init for the Intel 82371EB southbridge: make all ROM/BIOS regions
accessible (but not writable), so that reading/loading a payload from that area can work (for instance). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2700 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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