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| author | Mark Hsieh <mark_hsieh@wistron.corp-partner.google.com> | 2022-06-20 18:17:11 +0800 |
|---|---|---|
| committer | Nick Vaccaro <nvaccaro@google.com> | 2022-06-21 18:13:27 +0000 |
| commit | 21922e052cd776fe111c748e69365b01789de926 (patch) | |
| tree | 5a9b3699b61dce53c9b7b7e212b548575413fd67 /src/northbridge/intel | |
| parent | 05a6266f269a8815a016c8cd1a2880549282dc6c (diff) | |
mb/google/nissa/var/joxer: add generic LPDDR5 SPDs for Joxer
Add Makefile.inc to include five generic LPDDR5 SPDs for the following
parts for Joxer:
DRAM Part Name ID to assign
MT62F512M32D2DR-031 WT:B 0 (0000)
MT62F1G32D4DR-031 WT:B 1 (0001)
H9JCNNNBK3MLYR-N6E 0 (0000)
H58G56AK6BX069 2 (0010)
K3LKBKB0BM-MGCP 2 (0010)
BUG=b:236576115
TEST=USE="project_joxer emerge-nissa coreboot"
Signed-off-by: Mark Hsieh <mark_hsieh@wistron.corp-partner.google.com>
Change-Id: I90acb436bccd5dae8585436316246c50fc256842
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65253
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Reka Norman <rekanorman@chromium.org>
Reviewed-by: Kangheui Won <khwon@chromium.org>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Diffstat (limited to 'src/northbridge/intel')
0 files changed, 0 insertions, 0 deletions