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authorPhilipp Hug <philipp@hug.cx>2019-02-08 13:28:33 +0100
committerron minnich <rminnich@gmail.com>2019-02-09 04:06:51 +0000
commitf813b84486228bdb1739ae58853f59aae08d8cc8 (patch)
tree408d6211d6912b619fc82c857859256af319efb5 /src/northbridge/intel
parent98ce3f8dadc3e84fbee4b141227c6acc79d4788f (diff)
riscv: Use correct argument in a1 when invoking payload
Fix a bug introduced by: 820dcfceb3901dbb00bb90c876e374126ca14e20 riscv: Simplify payload handling Put fdt into a1 correctly. Change-Id: I0dea7b88fde9d9a7365cb366917747d8110b9159 Signed-off-by: Philipp Hug <philipp@hug.cx> Reviewed-on: https://review.coreboot.org/c/31287 Reviewed-by: ron minnich <rminnich@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/northbridge/intel')
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