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author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-05-31 16:36:29 +0300 |
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committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-06-02 10:51:30 +0200 |
commit | fd2501b3f1af1d649484dcdae562cd0694eb61ee (patch) | |
tree | cc95ff7e387489a0936f2f86b8d51ab5d7b73878 /src/northbridge/intel | |
parent | 15935ebe242bcdd6c84f5f2e9fb8a573e69a1c60 (diff) |
i945: Fix TSEG size allocation for get_top_of_ram()
Seems boards with i945 had TSEG disabled so this had gone unnoticed.
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Change-Id: I6a00ea9121847ce2fede22538e1b53a870d761f1
Reviewed-on: http://review.coreboot.org/5892
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Vladimir Serbinenko <phcoder@gmail.com>
Diffstat (limited to 'src/northbridge/intel')
-rw-r--r-- | src/northbridge/intel/i945/ram_calc.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/northbridge/intel/i945/ram_calc.c b/src/northbridge/intel/i945/ram_calc.c index 23e3f41fa4..d09b2e1b10 100644 --- a/src/northbridge/intel/i945/ram_calc.c +++ b/src/northbridge/intel/i945/ram_calc.c @@ -36,18 +36,18 @@ unsigned long get_top_of_ram(void) } /* if TSEG enabled subtract size */ - switch(pci_read_config8(PCI_DEV(0, 0, 0), ESMRAM)) { + switch(pci_read_config8(PCI_DEV(0, 0, 0), ESMRAM) & 0x07) { case 0x01: /* 1MB TSEG */ - tom -= 0x10000; + tom -= 0x100000; break; case 0x03: /* 2MB TSEG */ - tom -= 0x20000; + tom -= 0x200000; break; case 0x05: /* 8MB TSEG */ - tom -= 0x80000; + tom -= 0x800000; break; default: /* TSEG either disabled or invalid */ |