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| author | Uwe Hermann <uwe@hermann-uwe.de> | 2007-05-03 08:50:37 +0000 |
|---|---|---|
| committer | Uwe Hermann <uwe@hermann-uwe.de> | 2007-05-03 08:50:37 +0000 |
| commit | d436a4b4bc035a3756a57ae8e632e16f7a95b9c9 (patch) | |
| tree | e61a55cb4f885f08b52cf04a37c8d7232cdc0ead /src/northbridge/intel | |
| parent | 941a6f078ece125a5c116315c82fcd3cb1feaf42 (diff) | |
Correct the RAM checking code to _not_ check the range from 640 KB - 1 MB,
as that is not RAM but used for other stuff.
First try at PCI init added to src/mainboard/tyan/s1846/Config.lb.
Use a real payload (FILO) per default now.
Note: this cannot boot a payload, yet, but it gets a lot further now.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2623 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge/intel')
0 files changed, 0 insertions, 0 deletions