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authorAngel Pons <th3fanbus@gmail.com>2021-01-13 18:27:31 +0100
committerPatrick Georgi <pgeorgi@google.com>2021-02-07 22:36:57 +0000
commita6daff192f942b8310e090d4701e97df1709d0a8 (patch)
tree26f3f18eef7c31aebfbd84696594063023b55dfa /src/northbridge/intel
parent9e58afef598a4efbb6471ec04be5f5979bab9a66 (diff)
nb/intel/x4x: Constify write leveling arrays
Change-Id: I3be3952aaba1fe2da5490b071b4e3609773e84a5 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49403 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/northbridge/intel')
-rw-r--r--src/northbridge/intel/x4x/dq_dqs.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/northbridge/intel/x4x/dq_dqs.c b/src/northbridge/intel/x4x/dq_dqs.c
index 0a65165271..867c862e5f 100644
--- a/src/northbridge/intel/x4x/dq_dqs.c
+++ b/src/northbridge/intel/x4x/dq_dqs.c
@@ -766,9 +766,9 @@ void search_write_leveling(struct sysinfo *s)
u8 config, rank0, rank1, lane;
struct dll_setting dq_setting;
- u8 chanconfig_lut[16]={0, 6, 4, 6, 7, 3, 1, 3, 5, 2, 0, 2, 7, 3, 1, 3};
+ const u8 chanconfig_lut[16] = {0, 6, 4, 6, 7, 3, 1, 3, 5, 2, 0, 2, 7, 3, 1, 3};
- u8 odt_force[8][4] = { /* [Config][leveling rank] */
+ const u8 odt_force[8][4] = { /* [Config][leveling rank] */
{0x5, 0x6, 0x5, 0x9},
{0x5, 0x6, 0x5, 0x0},
{0x5, 0x0, 0x5, 0x9},