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authorStefan Reinauer <reinauer@chromium.org>2012-09-04 10:59:29 -0700
committerRonald G. Minnich <rminnich@gmail.com>2012-11-14 05:38:47 +0100
commit7e8c8e92bb7c754a759b7f3bf955f6fd95d44d86 (patch)
tree58d237417e5dd5552b1bd253a86e06c07a3bf6e3 /src/northbridge/intel
parente8179b51380cf0922466c33a9a0998a65f246a84 (diff)
Add PCIe init and NMode flag to PEI data structure
The IvyBridge reference code does some slow and extensive PCIe init that we do not need on Link. Hence, add a flag to disable/enable running that init code from coreboot. NMode was used during bringup. We'll switch the setting back to auto, to let MRC decide the right thing. Change-Id: Ia989bb9ea079aadfeb41dc3029b7c2c623e84760 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/1826 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martin@se-eng.com> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/northbridge/intel')
-rw-r--r--src/northbridge/intel/sandybridge/pei_data.h13
1 files changed, 12 insertions, 1 deletions
diff --git a/src/northbridge/intel/sandybridge/pei_data.h b/src/northbridge/intel/sandybridge/pei_data.h
index cabda3fea4..8c907c1db8 100644
--- a/src/northbridge/intel/sandybridge/pei_data.h
+++ b/src/northbridge/intel/sandybridge/pei_data.h
@@ -31,7 +31,7 @@
#define PEI_DATA_H
typedef void (*tx_byte_func)(unsigned char byte);
-#define PEI_VERSION 3
+#define PEI_VERSION 4
struct pei_data
{
uint32_t pei_version;
@@ -99,6 +99,17 @@ struct pei_data
uint8_t spd_data[4][256];
tx_byte_func tx_byte;
int ddr3lv_support;
+ /* pcie_init needs to be set to 1 to have the system agent initialize
+ * PCIe. Note: This should only be required if your system has Gen3 devices
+ * and it will increase your boot time by at least 100ms.
+ */
+ int pcie_init;
+ /* N mode functionality. Leave this setting at 0.
+ * 0 Auto
+ * 1 1N
+ * 2 2N
+ */
+ int nmode;
} __attribute__((packed));
#endif