diff options
| author | Marc Jones <marc.jones@se-eng.com> | 2015-04-22 23:16:31 -0600 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2015-04-24 00:37:37 +0200 |
| commit | 786879777a70cb82c94588e6d14c8fdd18ab4345 (patch) | |
| tree | a3dea1ee11739a00b63ffead17d7cd29078a70b8 /src/northbridge/intel | |
| parent | be34797e4c2a5b74bb8fcbbe9e4301b471d185e5 (diff) | |
fsp: Move fsp to fsp1_0
Prepare for FSP 1.1 integration by moving the FSP to a FSP 1.0 specific
directory. See follow-on patches for sharing of common code.
Change-Id: Ic58cb4074c65b91d119909132a012876d7ee7b74
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Reviewed-on: http://review.coreboot.org/9970
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/northbridge/intel')
6 files changed, 6 insertions, 6 deletions
diff --git a/src/northbridge/intel/fsp_rangeley/chip.h b/src/northbridge/intel/fsp_rangeley/chip.h index a8d0a1f137..02a69b950f 100644 --- a/src/northbridge/intel/fsp_rangeley/chip.h +++ b/src/northbridge/intel/fsp_rangeley/chip.h @@ -22,7 +22,7 @@ #define _FSP_RANGELEY_CHIP_H_ #include <arch/acpi.h> -#include <drivers/intel/fsp/fsp_values.h> +#include <drivers/intel/fsp1_0/fsp_values.h> struct northbridge_intel_fsp_rangeley_config { diff --git a/src/northbridge/intel/fsp_rangeley/fsp/Kconfig b/src/northbridge/intel/fsp_rangeley/fsp/Kconfig index 82ecedaf7b..82d62c53ca 100644 --- a/src/northbridge/intel/fsp_rangeley/fsp/Kconfig +++ b/src/northbridge/intel/fsp_rangeley/fsp/Kconfig @@ -19,7 +19,7 @@ config RANGELEY_FSP_SPECIFIC_OPTIONS def_bool y - select PLATFORM_USES_FSP + select PLATFORM_USES_FSP1_0 select USE_GENERIC_FSP_CAR_INC select FSP_USES_UPD select ENABLE_MRC_CACHE #rangeley FSP always needs MRC data diff --git a/src/northbridge/intel/fsp_rangeley/fsp/chipset_fsp_util.c b/src/northbridge/intel/fsp_rangeley/fsp/chipset_fsp_util.c index 949cf2a767..3a4cd6ec1b 100644 --- a/src/northbridge/intel/fsp_rangeley/fsp/chipset_fsp_util.c +++ b/src/northbridge/intel/fsp_rangeley/fsp/chipset_fsp_util.c @@ -25,7 +25,7 @@ #include <cbmem.h> #include <device/device.h> #include <southbridge/intel/fsp_rangeley/pci_devs.h> -#include <drivers/intel/fsp/fsp_util.h> +#include <drivers/intel/fsp1_0/fsp_util.h> #include <fspvpd.h> #include <fspbootmode.h> #include <reset.h> diff --git a/src/northbridge/intel/fsp_rangeley/northbridge.c b/src/northbridge/intel/fsp_rangeley/northbridge.c index be3a3acfb8..14d0853de7 100644 --- a/src/northbridge/intel/fsp_rangeley/northbridge.c +++ b/src/northbridge/intel/fsp_rangeley/northbridge.c @@ -35,7 +35,7 @@ #include <cbmem.h> #include "chip.h" #include "northbridge.h" -#include <drivers/intel/fsp/fsp_util.h> +#include <drivers/intel/fsp1_0/fsp_util.h> #include <cpu/x86/lapic.h> static int bridge_revision_id = -1; diff --git a/src/northbridge/intel/fsp_rangeley/raminit.c b/src/northbridge/intel/fsp_rangeley/raminit.c index 9626745e47..c920f9df21 100644 --- a/src/northbridge/intel/fsp_rangeley/raminit.c +++ b/src/northbridge/intel/fsp_rangeley/raminit.c @@ -24,7 +24,7 @@ #include <cbmem.h> #include <device/pci_def.h> #include "northbridge.h" -#include <drivers/intel/fsp/fsp_util.h> +#include <drivers/intel/fsp1_0/fsp_util.h> static uintptr_t smm_region_start(void) { diff --git a/src/northbridge/intel/fsp_sandybridge/fsp/Kconfig b/src/northbridge/intel/fsp_sandybridge/fsp/Kconfig index 03999618fc..0b4ca972e2 100644 --- a/src/northbridge/intel/fsp_sandybridge/fsp/Kconfig +++ b/src/northbridge/intel/fsp_sandybridge/fsp/Kconfig @@ -19,7 +19,7 @@ config SANDYBRIDGE_FSP_SPECIFIC_OPTIONS def_bool y - select PLATFORM_USES_FSP + select PLATFORM_USES_FSP1_0 select USE_GENERIC_FSP_CAR_INC select FSP_USES_UPD if SOUTHBRIDGE_INTEL_FSP_I89XX |